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| author | Alex Frid <afrid@nvidia.com> | 2011-01-22 23:16:44 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:41:57 -0800 |
| commit | b85f76575eadcad4efb85400edbd583d6de5d8af (patch) | |
| tree | 5e7ea4fcadbf23474caa056ac19d1cb50a834e0b /arch/arm/mach-tegra/cpu-tegra.c | |
| parent | f3162c3f241b9228a9f3d2757609b9859d47e694 (diff) | |
ARM: tegra: dvfs: Update MPE dvfs table
Updated MPE clock dvfs table with recent characterization data.
As a result MPE clock limit is increased to 300MHz across all
tegra 2 SKUs.
Original-Change-Id: Ibe700770c7d109a397cb140b6f217a8d48509ff1
Reviewed-on: http://git-master/r/16662
Reviewed-by: Amit Kamath <akamath@nvidia.com>
Tested-by: Amit Kamath <akamath@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R6e5c6cef46a05527a31d70ed87c6d3f58077c5e7
Diffstat (limited to 'arch/arm/mach-tegra/cpu-tegra.c')
0 files changed, 0 insertions, 0 deletions