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authorBo Yan <byan@nvidia.com>2013-02-08 10:54:27 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:57:41 -0700
commit5a9a08dfb7d069e1012803915cb79a8750e09401 (patch)
tree751240b03c8a4e19be08e2341a1cd1ecdc68b122 /arch/arm/mach-tegra/cpuidle-t11x.c
parent4fa8bbde4e1bbb3654a2741fcaa734d3b077261a (diff)
ARM: tegra11x: Support min residency per platform
Though there is no compelling reason to have different residency requirement of Fmin@Vmin and non-CPU power gating for each platform, still makes it possible to define these thresholds per platform. If they are not defined, the default value are taken. Change-Id: I663afb869338bd2e4078b15253c8f8e29c3d6b3c Signed-off-by: Bo Yan <byan@nvidia.com> Reviewed-on: http://git-master/r/198846 (cherry picked from commit 841fb812bfc793c3028b72cbfa05ce26a21226c4) Reviewed-on: http://git-master/r/200860 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t11x.c')
-rw-r--r--arch/arm/mach-tegra/cpuidle-t11x.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t11x.c b/arch/arm/mach-tegra/cpuidle-t11x.c
index 5592aa0d23fd..2f06029618e1 100644
--- a/arch/arm/mach-tegra/cpuidle-t11x.c
+++ b/arch/arm/mach-tegra/cpuidle-t11x.c
@@ -72,10 +72,6 @@
#define ARCH_TIMER_CTRL_ENABLE (1 << 0)
#define ARCH_TIMER_CTRL_IT_MASK (1 << 1)
-#define TEGRA_MIN_RESIDENCY_CLKGT_VMIN 2000
-#define TEGRA_MIN_RESIDENCY_NCPU_SLOW 2000
-#define TEGRA_MIN_RESIDENCY_NCPU_FAST 13000
-
#ifdef CONFIG_SMP
static s64 tegra_cpu_wake_by_time[4] = {
LLONG_MAX, LLONG_MAX, LLONG_MAX, LLONG_MAX };
@@ -478,7 +474,7 @@ bool tegra11x_idle_power_down(struct cpuidle_device *dev,
if (is_lp_cluster()) {
if (slow_cluster_power_gating_noncpu &&
- (request > TEGRA_MIN_RESIDENCY_NCPU_SLOW))
+ (request > tegra_min_residency_ncpu()))
power_gating_cpu_only = false;
else
power_gating_cpu_only = true;
@@ -492,8 +488,8 @@ bool tegra11x_idle_power_down(struct cpuidle_device *dev,
else if (tegra_force_clkgt_at_vmin ==
TEGRA_CPUIDLE_FORCE_NO_CLKGT_VMIN)
clkgt_at_vmin = false;
- else if ((request >= TEGRA_MIN_RESIDENCY_CLKGT_VMIN) &&
- (request < TEGRA_MIN_RESIDENCY_NCPU_FAST))
+ else if ((request >= tegra_min_residency_vmin_fmin()) &&
+ (request < tegra_min_residency_ncpu()))
clkgt_at_vmin = true;
if (!cpu_gating_only && tegra_rail_off_is_allowed()) {
@@ -501,7 +497,7 @@ bool tegra11x_idle_power_down(struct cpuidle_device *dev,
TEGRA_POWER_CLUSTER_FORCE_MASK)
power_gating_cpu_only = false;
else if (request >
- TEGRA_MIN_RESIDENCY_NCPU_FAST)
+ tegra_min_residency_ncpu())
power_gating_cpu_only = false;
else
power_gating_cpu_only = true;