diff options
author | Bo Yan <byan@nvidia.com> | 2012-10-30 13:51:33 -0700 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:41:14 -0700 |
commit | cff3ec8397693ce7000a4b847e0aa6c645bbe0a1 (patch) | |
tree | 7753feed104e96779a59a21ea2ec7a990d62b640 /arch/arm/mach-tegra/cpuidle-t11x.c | |
parent | 5af8c47042525b0166445fe5f11631d78a93cf00 (diff) |
ARM: tegra11x: cpuidle: Remove LP2 references
This change completely removes references to lp2 in cpuidle-t11x.c,
some related changes also affect cpuidle-t2.c, cpuidle-t3.c, and a
few other files.
bug 1034196
Change-Id: Ic2387bf614b39bd08ed4b2fc6e996f6fbf8306c0
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/160017
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t11x.c')
-rw-r--r-- | arch/arm/mach-tegra/cpuidle-t11x.c | 145 |
1 files changed, 73 insertions, 72 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t11x.c b/arch/arm/mach-tegra/cpuidle-t11x.c index c5c3786cf27c..031cfa29ec45 100644 --- a/arch/arm/mach-tegra/cpuidle-t11x.c +++ b/arch/arm/mach-tegra/cpuidle-t11x.c @@ -88,14 +88,14 @@ module_param(fast_cluster_power_down_mode, uint, 0644); static struct clk *cpu_clk_for_dvfs; -static int lp2_exit_latencies[5]; +static int pd_exit_latencies[5]; static struct { unsigned int cpu_ready_count[5]; unsigned int tear_down_count[5]; - unsigned long long cpu_wants_lp2_time[5]; + unsigned long long cpu_wants_pd_time[5]; unsigned long long cpu_pg_time[5]; - unsigned long long rail_pg_time; + unsigned long long rail_pd_time; unsigned long long c0nc_pg_time; unsigned long long c1nc_pg_time; unsigned int rail_gating_count; @@ -110,8 +110,8 @@ static struct { unsigned int c1nc_gating_bin[32]; unsigned int c1nc_gating_done_count; unsigned int c1nc_gating_done_count_bin[32]; - unsigned int lp2_int_count[NR_IRQS]; - unsigned int last_lp2_int_count[NR_IRQS]; + unsigned int pd_int_count[NR_IRQS]; + unsigned int last_pd_int_count[NR_IRQS]; } idle_stats; static inline unsigned int time_to_bin(unsigned int time) @@ -130,14 +130,14 @@ static inline unsigned int cpu_number(unsigned int n) return is_lp_cluster() ? 4 : n; } -void tegra11x_cpu_idle_stats_lp2_ready(unsigned int cpu) +void tegra11x_cpu_idle_stats_pd_ready(unsigned int cpu) { idle_stats.cpu_ready_count[cpu_number(cpu)]++; } -void tegra11x_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us) +void tegra11x_cpu_idle_stats_pd_time(unsigned int cpu, s64 us) { - idle_stats.cpu_wants_lp2_time[cpu_number(cpu)] += us; + idle_stats.cpu_wants_pd_time[cpu_number(cpu)] += us; } /* Allow rail off only if all secondary CPUs are power gated, and no @@ -156,7 +156,7 @@ static bool tegra_rail_off_is_allowed(void) return true; } -bool tegra11x_lp2_is_allowed(struct cpuidle_device *dev, +bool tegra11x_pd_is_allowed(struct cpuidle_device *dev, struct cpuidle_state *state) { s64 request; @@ -166,10 +166,10 @@ bool tegra11x_lp2_is_allowed(struct cpuidle_device *dev, return false; request = ktime_to_us(tick_nohz_get_sleep_length()); - if (state->exit_latency != lp2_exit_latencies[cpu_number(dev->cpu)]) { + if (state->exit_latency != pd_exit_latencies[cpu_number(dev->cpu)]) { /* possible on the 1st entry after cluster switch*/ - state->exit_latency = lp2_exit_latencies[cpu_number(dev->cpu)]; - tegra_lp2_update_target_residency(state); + state->exit_latency = pd_exit_latencies[cpu_number(dev->cpu)]; + tegra_pd_update_target_residency(state); } if (request < state->target_residency) { /* Not enough time left to enter LP2 */ @@ -179,7 +179,7 @@ bool tegra11x_lp2_is_allowed(struct cpuidle_device *dev, return true; } -static inline void tegra11_lp2_restore_affinity(void) +static inline void tegra11_irq_restore_affinity(void) { #ifdef CONFIG_SMP /* Disable the distributor. */ @@ -254,8 +254,8 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - /* Cancel LP2 wake timers for all secondary CPUs */ - tegra_lp2_timer_cancel_secondary(); + /* Cancel power gating wake timers for all secondary CPUs */ + tegra_pd_timer_cancel_secondary(); /* Save and disable the affinity setting for the other CPUs and route all interrupts to CPU0. */ @@ -268,7 +268,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, cpu_pm_enter(); sleep_time = request - - lp2_exit_latencies[cpu_number(dev->cpu)]; + pd_exit_latencies[cpu_number(dev->cpu)]; bin = time_to_bin((u32)request / 1000); idle_stats.tear_down_count[cpu_number(dev->cpu)]++; @@ -297,11 +297,11 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, } } - if (tegra_idle_lp2_last(sleep_time, flag) == 0) + if (tegra_idle_power_down_last(sleep_time, flag) == 0) sleep_completed = true; else { int irq = tegra_gic_pending_interrupt(); - idle_stats.lp2_int_count[irq]++; + idle_stats.pd_int_count[irq]++; } clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu); @@ -310,7 +310,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, tegra_dvfs_rail_on(tegra_cpu_rail, exit_time); if (flag == TEGRA_POWER_CLUSTER_PART_CRAIL) - idle_stats.rail_pg_time += + idle_stats.rail_pd_time += ktime_to_us(ktime_sub(exit_time, entry_time)); else if (flag == TEGRA_POWER_CLUSTER_PART_NONCPU) { if (is_lp_cluster()) @@ -322,7 +322,7 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, } if (multi_cpu_entry) - tegra11_lp2_restore_affinity(); + tegra11_irq_restore_affinity(); if (sleep_completed) { /* @@ -331,10 +331,10 @@ static bool tegra_cpu_cluster_power_down(struct cpuidle_device *dev, */ int offset = ktime_to_us(ktime_sub(exit_time, entry_time)) - request; - int latency = lp2_exit_latencies[cpu_number(dev->cpu)] + + int latency = pd_exit_latencies[cpu_number(dev->cpu)] + offset / 16; latency = clamp(latency, 0, 10000); - lp2_exit_latencies[cpu_number(dev->cpu)] = latency; + pd_exit_latencies[cpu_number(dev->cpu)] = latency; state->exit_latency = latency; /* for idle governor */ smp_wmb(); @@ -393,7 +393,7 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev, } } - if (!tegra_is_lp2_timer_ready(dev->cpu) || + if (!tegra_is_cpu_wake_timer_ready(dev->cpu) || (request < state->target_residency) || (!ts) || (ts->nohz_mode == NOHZ_MODE_INACTIVE)) { /* @@ -409,7 +409,7 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev, sleep_time = request - state->exit_latency; clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu); arch_timer_suspend(&timer_context); - tegra_lp2_set_trigger(sleep_time); + tegra_pd_set_trigger(sleep_time); #endif idle_stats.tear_down_count[cpu_number(dev->cpu)]++; @@ -427,8 +427,8 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev, if (!arch_timer_get_state(&timer_context)) sleep_completed = (timer_context.cntp_tval <= 0); #else - sleep_completed = !tegra_lp2_timer_remain(); - tegra_lp2_set_trigger(0); + sleep_completed = !tegra_pd_timer_remain(); + tegra_pd_set_trigger(0); arch_timer_resume(&timer_context); clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu); #endif @@ -440,10 +440,10 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev, * adjust the exit latency based on measurement */ int offset = sleep_time - request; - int latency = lp2_exit_latencies[cpu_number(dev->cpu)] + + int latency = pd_exit_latencies[cpu_number(dev->cpu)] + offset / 16; latency = clamp(latency, 0, 10000); - lp2_exit_latencies[cpu_number(dev->cpu)] = latency; + pd_exit_latencies[cpu_number(dev->cpu)] = latency; state->exit_latency = latency; /* for idle governor */ smp_wmb(); } @@ -453,15 +453,15 @@ static bool tegra_cpu_core_power_down(struct cpuidle_device *dev, return true; } -bool tegra11x_idle_lp2(struct cpuidle_device *dev, +bool tegra11x_idle_power_down(struct cpuidle_device *dev, struct cpuidle_state *state) { - bool entered_lp2; + bool power_down; bool cpu_gating_only = false; bool power_gating_cpu_only = true; s64 request = ktime_to_us(tick_nohz_get_sleep_length()); - tegra_set_cpu_in_lp2(dev->cpu); + tegra_set_cpu_in_pd(dev->cpu); cpu_gating_only = (((fast_cluster_power_down_mode << TEGRA_POWER_CLUSTER_PART_SHIFT) & TEGRA_POWER_CLUSTER_PART_MASK) == 0); @@ -481,17 +481,17 @@ bool tegra11x_idle_lp2(struct cpuidle_device *dev, power_gating_cpu_only = true; if (power_gating_cpu_only) - entered_lp2 = tegra_cpu_core_power_down(dev, state, request); + power_down = tegra_cpu_core_power_down(dev, state, request); else - entered_lp2 = tegra_cpu_cluster_power_down(dev, state, request); + power_down = tegra_cpu_cluster_power_down(dev, state, request); - tegra_clear_cpu_in_lp2(dev->cpu); + tegra_clear_cpu_in_pd(dev->cpu); - return entered_lp2; + return power_down; } #ifdef CONFIG_DEBUG_FS -int tegra11x_lp2_debug_show(struct seq_file *s, void *data) +int tegra11x_pd_debug_show(struct seq_file *s, void *data) { int bin; int i; @@ -533,11 +533,11 @@ int tegra11x_lp2_debug_show(struct seq_file *s, void *data) seq_printf(s, "\n"); seq_printf(s, "cpu ready time: " \ "%8llu %8llu %8llu %8llu %8llu ms\n", - div64_u64(idle_stats.cpu_wants_lp2_time[0], 1000), - div64_u64(idle_stats.cpu_wants_lp2_time[1], 1000), - div64_u64(idle_stats.cpu_wants_lp2_time[2], 1000), - div64_u64(idle_stats.cpu_wants_lp2_time[3], 1000), - div64_u64(idle_stats.cpu_wants_lp2_time[4], 1000)); + div64_u64(idle_stats.cpu_wants_pd_time[0], 1000), + div64_u64(idle_stats.cpu_wants_pd_time[1], 1000), + div64_u64(idle_stats.cpu_wants_pd_time[2], 1000), + div64_u64(idle_stats.cpu_wants_pd_time[3], 1000), + div64_u64(idle_stats.cpu_wants_pd_time[4], 1000)); seq_printf(s, "cpu power gating time: " \ "%8llu %8llu %8llu %8llu %8llu ms\n", @@ -547,39 +547,40 @@ int tegra11x_lp2_debug_show(struct seq_file *s, void *data) div64_u64(idle_stats.cpu_pg_time[3], 1000), div64_u64(idle_stats.cpu_pg_time[4], 1000)); - seq_printf(s, "lp2 %%: %7d%% %7d%% %7d%% %7d%% %7d%%\n", - (int)(idle_stats.cpu_wants_lp2_time[0] ? + seq_printf(s, "power gated %%: " \ + "%7d%% %7d%% %7d%% %7d%% %7d%%\n", + (int)(idle_stats.cpu_wants_pd_time[0] ? div64_u64(idle_stats.cpu_pg_time[0] * 100, - idle_stats.cpu_wants_lp2_time[0]) : 0), - (int)(idle_stats.cpu_wants_lp2_time[1] ? + idle_stats.cpu_wants_pd_time[0]) : 0), + (int)(idle_stats.cpu_wants_pd_time[1] ? div64_u64(idle_stats.cpu_pg_time[1] * 100, - idle_stats.cpu_wants_lp2_time[1]) : 0), - (int)(idle_stats.cpu_wants_lp2_time[2] ? + idle_stats.cpu_wants_pd_time[1]) : 0), + (int)(idle_stats.cpu_wants_pd_time[2] ? div64_u64(idle_stats.cpu_pg_time[2] * 100, - idle_stats.cpu_wants_lp2_time[2]) : 0), - (int)(idle_stats.cpu_wants_lp2_time[3] ? + idle_stats.cpu_wants_pd_time[2]) : 0), + (int)(idle_stats.cpu_wants_pd_time[3] ? div64_u64(idle_stats.cpu_pg_time[3] * 100, - idle_stats.cpu_wants_lp2_time[3]) : 0), - (int)(idle_stats.cpu_wants_lp2_time[4] ? + idle_stats.cpu_wants_pd_time[3]) : 0), + (int)(idle_stats.cpu_wants_pd_time[4] ? div64_u64(idle_stats.cpu_pg_time[4] * 100, - idle_stats.cpu_wants_lp2_time[4]) : 0)); + idle_stats.cpu_wants_pd_time[4]) : 0)); seq_printf(s, "\n"); seq_printf(s, "rail gating time c0nc gating time c1nc gating time\n"); seq_printf(s, "%8llu ms %8llu ms %8llu ms\n", - div64_u64(idle_stats.rail_pg_time, 1000), + div64_u64(idle_stats.rail_pd_time, 1000), div64_u64(idle_stats.c0nc_pg_time, 1000), div64_u64(idle_stats.c1nc_pg_time, 1000)); seq_printf(s, "%8d%% %8d%% %8d%%\n", - (int)(idle_stats.cpu_wants_lp2_time[0] ? - div64_u64(idle_stats.rail_pg_time * 100, - idle_stats.cpu_wants_lp2_time[0]) : 0), - (int)(idle_stats.cpu_wants_lp2_time[0] ? + (int)(idle_stats.cpu_wants_pd_time[0] ? + div64_u64(idle_stats.rail_pd_time * 100, + idle_stats.cpu_wants_pd_time[0]) : 0), + (int)(idle_stats.cpu_wants_pd_time[0] ? div64_u64(idle_stats.c0nc_pg_time * 100, - idle_stats.cpu_wants_lp2_time[0]) : 0), - (int)(idle_stats.cpu_wants_lp2_time[4] ? + idle_stats.cpu_wants_pd_time[0]) : 0), + (int)(idle_stats.cpu_wants_pd_time[4] ? div64_u64(idle_stats.c1nc_pg_time * 100, - idle_stats.cpu_wants_lp2_time[4]) : 0)); + idle_stats.cpu_wants_pd_time[4]) : 0)); seq_printf(s, "\n"); @@ -629,15 +630,15 @@ int tegra11x_lp2_debug_show(struct seq_file *s, void *data) "int", "name", "count", "last count"); seq_printf(s, "--------------------------------------------\n"); for (i = 0; i < NR_IRQS; i++) { - if (idle_stats.lp2_int_count[i] == 0) + if (idle_stats.pd_int_count[i] == 0) continue; seq_printf(s, "%3d %20s %6d %10d\n", i, irq_to_desc(i)->action ? irq_to_desc(i)->action->name ?: "???" : "???", - idle_stats.lp2_int_count[i], - idle_stats.lp2_int_count[i] - - idle_stats.last_lp2_int_count[i]); - idle_stats.last_lp2_int_count[i] = idle_stats.lp2_int_count[i]; + idle_stats.pd_int_count[i], + idle_stats.pd_int_count[i] - + idle_stats.last_pd_int_count[i]); + idle_stats.last_pd_int_count[i] = idle_stats.pd_int_count[i]; }; return 0; } @@ -647,19 +648,19 @@ int __init tegra11x_cpuidle_init_soc(struct tegra_cpuidle_ops *idle_ops) { int i; struct tegra_cpuidle_ops ops = { - tegra11x_idle_lp2, - tegra11x_cpu_idle_stats_lp2_ready, - tegra11x_cpu_idle_stats_lp2_time, - tegra11x_lp2_is_allowed, + tegra11x_idle_power_down, + tegra11x_cpu_idle_stats_pd_ready, + tegra11x_cpu_idle_stats_pd_time, + tegra11x_pd_is_allowed, #ifdef CONFIG_DEBUG_FS - tegra11x_lp2_debug_show + tegra11x_pd_debug_show #endif }; cpu_clk_for_dvfs = tegra_get_clock_by_name("cpu_g"); - for (i = 0; i < ARRAY_SIZE(lp2_exit_latencies); i++) - lp2_exit_latencies[i] = tegra_lp2_exit_latency; + for (i = 0; i < ARRAY_SIZE(pd_exit_latencies); i++) + pd_exit_latencies[i] = tegra_pg_exit_latency; *idle_ops = ops; return 0; |