diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-22 13:33:58 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:51 -0800 |
| commit | 8142ecb1c47f4e19262141d07884ebd652943c3b (patch) | |
| tree | de096039981934cb3faf0bce37b72377dc60a134 /arch/arm/mach-tegra/cpuidle-t2.c | |
| parent | c420133f5b49b9abbfd825b3fb5095e49c41e38f (diff) | |
ARM: tegra: LP2: Update statistics
Change-Id: Ic878edc316865df79a571255fd0462360599472a
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R206b2c1cd07c360ea2f5be1a54c9b29944bc1df3
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t2.c')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle-t2.c | 34 |
1 files changed, 29 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t2.c b/arch/arm/mach-tegra/cpuidle-t2.c index ff2674c35597..d2baba095ca2 100644 --- a/arch/arm/mach-tegra/cpuidle-t2.c +++ b/arch/arm/mach-tegra/cpuidle-t2.c @@ -55,11 +55,18 @@ static struct { unsigned int both_idle_count; unsigned int tear_down_count; unsigned int lp2_count; + unsigned int lp2_completed_count; unsigned int lp2_count_bin[32]; + unsigned int lp2_completed_count_bin[32]; unsigned int lp2_int_count[NR_IRQS]; unsigned int last_lp2_int_count[NR_IRQS]; } idle_stats; +static inline unsigned int time_to_bin(unsigned int time) +{ + return fls(time); +} + #ifdef CONFIG_SMP static void __iomem *clk_rst = IO_ADDRESS(TEGRA_CLK_RESET_BASE); @@ -155,6 +162,7 @@ static int tegra2_idle_lp2_last(struct cpuidle_device *dev, ktime_t entry_time; ktime_t exit_time; bool sleep_completed = false; + int bin; int i; while (tegra2_cpu_is_resettable_soon()) @@ -169,12 +177,17 @@ static int tegra2_idle_lp2_last(struct cpuidle_device *dev, return -EBUSY; } + idle_stats.tear_down_count++; request = min_t(s64, request, tegra_cpu1_idle_time); entry_time = ktime_get(); if (request > state->target_residency) { s64 sleep_time = request - tegra_lp2_exit_latency; + bin = time_to_bin((u32)request / 1000); + idle_stats.lp2_count++; + idle_stats.lp2_count_bin[bin]++; + if (tegra_idle_lp2_last(sleep_time, 0) == 0) sleep_completed = true; else @@ -201,8 +214,12 @@ static int tegra2_idle_lp2_last(struct cpuidle_device *dev, tegra_lp2_exit_latency = latency; smp_wmb(); - pr_debug("%lld %lld %ld\n", request, actual_time, - offset); + idle_stats.lp2_completed_count++; + idle_stats.lp2_completed_count_bin[bin]++; + idle_stats.in_lp2_time += actual_time; + + pr_debug("%lld %lld %ld %d\n", request, actual_time, + offset, bin); } return 0; @@ -267,6 +284,10 @@ int tegra2_lp2_debug_show(struct seq_file *s, void *data) seq_printf(s, "lp2: %8u %7u%%\n", idle_stats.lp2_count, idle_stats.lp2_count * 100 / (idle_stats.both_idle_count ?: 1)); + seq_printf(s, "lp2 completed: %8u %7u%%\n", + idle_stats.lp2_completed_count, + idle_stats.lp2_completed_count * 100 / + (idle_stats.lp2_count ?: 1)); seq_printf(s, "\n"); seq_printf(s, "cpu ready time: %8llu %8llu ms\n", @@ -280,14 +301,17 @@ int tegra2_lp2_debug_show(struct seq_file *s, void *data) idle_stats.cpu_wants_lp2_time[1] ?: 1)); seq_printf(s, "\n"); - seq_printf(s, "%19s %8s\n", "", "lp2"); + seq_printf(s, "%19s %8s %8s %8s\n", "", "lp2", "comp", "%"); seq_printf(s, "-------------------------------------------------\n"); for (bin = 0; bin < 32; bin++) { if (idle_stats.lp2_count_bin[bin] == 0) continue; - seq_printf(s, "%6u - %6u ms: %8u\n", + seq_printf(s, "%6u - %6u ms: %8u %8u %7u%%\n", 1 << (bin - 1), 1 << bin, - idle_stats.lp2_count_bin[bin]); + idle_stats.lp2_count_bin[bin], + idle_stats.lp2_completed_count_bin[bin], + idle_stats.lp2_completed_count_bin[bin] * 100 / + idle_stats.lp2_count_bin[bin]); } seq_printf(s, "\n"); |