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authorScott Williams <scwilliams@nvidia.com>2011-08-04 18:41:41 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:47:02 -0800
commit4182b75abce8204b13a783dd2f14d4aa63e58aaf (patch)
tree087b91f71015634ab371c90e15ed92685caa7d56 /arch/arm/mach-tegra/cpuidle-t3.c
parent75602437e212d6aa0deac3f5d644ddb2c2939bd0 (diff)
ARM: tegra: power: Rename variables for consistency
Rename Tegra3 CPU idle handler variables to be the same as their Tegra2 counterparts for consistency. Change-Id: I49a03182ff5a15d34847b3837f681ca842dcf643 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rc71d7d71bebb197c983180429f24de7708d8dfea
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t3.c')
-rw-r--r--arch/arm/mach-tegra/cpuidle-t3.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t3.c b/arch/arm/mach-tegra/cpuidle-t3.c
index 5614994aa0ab..34bb3d0b13c7 100644
--- a/arch/arm/mach-tegra/cpuidle-t3.c
+++ b/arch/arm/mach-tegra/cpuidle-t3.c
@@ -149,13 +149,13 @@ bool tegra3_lp2_is_allowed(struct cpuidle_device *dev,
static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
struct cpuidle_state *state, s64 request)
{
- ktime_t enter;
- ktime_t exit;
+ ktime_t entry_time;
+ ktime_t exit_time;
bool sleep_completed = false;
int bin;
/* LP2 entry time */
- enter = ktime_get();
+ entry_time = ktime_get();
if (request < state->target_residency) {
/* Not enough time left to enter LP2 */
@@ -191,7 +191,7 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
tegra_gic_dist_enable();
/* LP2 initial targeted wake time */
- wake_time = ktime_to_us(enter) + request;
+ wake_time = ktime_to_us(entry_time) + request;
/* CPU0 must wake up before any of the other CPUs. */
smp_rmb();
@@ -200,7 +200,7 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
tegra_cpu_wake_by_time[i]);
/* LP2 actual targeted wake time */
- request = wake_time - ktime_to_us(enter);
+ request = wake_time - ktime_to_us(entry_time);
BUG_ON(wake_time < 0LL);
}
#endif
@@ -237,13 +237,14 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
}
#endif
- exit = ktime_get();
+ exit_time = ktime_get();
if (sleep_completed) {
/*
* Stayed in LP2 for the full time until the next tick,
* adjust the exit latency based on measurement
*/
- int offset = ktime_to_us(ktime_sub(exit, enter)) - request;
+ int offset = ktime_to_us(ktime_sub(exit_time, entry_time))
+ - request;
int latency = tegra_lp2_exit_latency + offset / 16;
latency = clamp(latency, 0, 10000);
tegra_lp2_exit_latency = latency;
@@ -251,10 +252,11 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
idle_stats.lp2_completed_count++;
idle_stats.lp2_completed_count_bin[bin]++;
- idle_stats.in_lp2_time += ktime_to_us(ktime_sub(exit, enter));
+ idle_stats.in_lp2_time += ktime_to_us(
+ ktime_sub(exit_time, entry_time));
pr_debug("%lld %lld %d %d\n", request,
- ktime_to_us(ktime_sub(exit, enter)),
+ ktime_to_us(ktime_sub(exit_time, entry_time)),
offset, bin);
}
}