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authorJoseph Lehrer <jlehrer@nvidia.com>2012-01-02 08:03:32 -0800
committerRohan Somvanshi <rsomvanshi@nvidia.com>2012-01-10 08:13:14 -0800
commit4e2472f3c4cb1efe24f2ef1875ccb0ecec500df1 (patch)
tree2adc7fb5b895cddaf411277bd41c29bc2f7c0af8 /arch/arm/mach-tegra/cpuidle-t3.c
parentb9a658c9cb48992716411298d1d61ca42997248f (diff)
arm: tegra: REVERT "use unsigned cpuidle latency variables"
Reverting until LP2 hang problem better understood. bug 896827 Reverts I8c8226433d26efbbc1579372c9a73cbc5897f26c Signed-off-by: Joseph Lehrer <jlehrer@nvidia.com> Change-Id: I9ae1f8e75b77049baf26480691b98e6f9cacca4e (cherry picked from commit c0b30ab66c5f1286a5c1f10777c436a80f8f2fa8) Reviewed-on: http://git-master/r/72905 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Matt Wagner <mwagner@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-by: Joseph Lehrer <jlehrer@nvidia.com> Tested-by: Joseph Lehrer <jlehrer@nvidia.com> (cherry picked from commit 3d7b52eaf614848e8417c84b819c76faed306503) Reviewed-on: http://git-master/r/73951 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle-t3.c')
-rw-r--r--arch/arm/mach-tegra/cpuidle-t3.c25
1 files changed, 12 insertions, 13 deletions
diff --git a/arch/arm/mach-tegra/cpuidle-t3.c b/arch/arm/mach-tegra/cpuidle-t3.c
index 14d818e06e92..2dedf2c2248a 100644
--- a/arch/arm/mach-tegra/cpuidle-t3.c
+++ b/arch/arm/mach-tegra/cpuidle-t3.c
@@ -63,7 +63,7 @@
(IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x470)
#ifdef CONFIG_SMP
-static u64 tegra_cpu_wake_by_time[4] = {
+static s64 tegra_cpu_wake_by_time[4] = {
LLONG_MAX, LLONG_MAX, LLONG_MAX, LLONG_MAX };
#endif
@@ -118,7 +118,7 @@ void tegra3_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us)
bool tegra3_lp2_is_allowed(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
- unsigned int request;
+ s64 request;
if (!tegra_all_cpus_booted)
return false;
@@ -165,7 +165,7 @@ static inline void tegra3_lp3_fall_back(struct cpuidle_device *dev)
}
static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
- struct cpuidle_state *state, unsigned int request)
+ struct cpuidle_state *state, s64 request)
{
ktime_t entry_time;
ktime_t exit_time;
@@ -183,7 +183,7 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
#ifdef CONFIG_SMP
if (!is_lp_cluster() && (num_online_cpus() > 1)) {
- u64 wake_time;
+ s64 wake_time;
unsigned int i;
/* Disable the distributor -- this is the only way to
@@ -214,7 +214,7 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
/* CPU0 must wake up before any of the other CPUs. */
smp_rmb();
for (i = 1; i < CONFIG_NR_CPUS; i++)
- wake_time = min_t(u64, wake_time,
+ wake_time = min_t(s64, wake_time,
tegra_cpu_wake_by_time[i]);
/* LP2 actual targeted wake time */
@@ -224,9 +224,9 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
#endif
if (request > state->target_residency) {
- u64 sleep_time = request - tegra_lp2_exit_latency;
+ s64 sleep_time = request - tegra_lp2_exit_latency;
- bin = time_to_bin(request / 1000);
+ bin = time_to_bin((u32)request / 1000);
idle_stats.tear_down_count[cpu_number(dev->cpu)]++;
idle_stats.lp2_count++;
idle_stats.lp2_count_bin[bin]++;
@@ -270,10 +270,9 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
* Stayed in LP2 for the full time until the next tick,
* adjust the exit latency based on measurement
*/
- unsigned int offset = ktime_to_us(
- ktime_sub(exit_time, entry_time))
+ int offset = ktime_to_us(ktime_sub(exit_time, entry_time))
- request;
- unsigned int latency = tegra_lp2_exit_latency + offset / 16;
+ int latency = tegra_lp2_exit_latency + offset / 16;
latency = clamp(latency, 0, 10000);
tegra_lp2_exit_latency = latency;
smp_wmb();
@@ -283,14 +282,14 @@ static void tegra3_idle_enter_lp2_cpu_0(struct cpuidle_device *dev,
idle_stats.in_lp2_time[cpu_number(dev->cpu)] +=
ktime_to_us(ktime_sub(exit_time, entry_time));
- pr_debug("%d %lld %d %d\n", request,
+ pr_debug("%lld %lld %d %d\n", request,
ktime_to_us(ktime_sub(exit_time, entry_time)),
offset, bin);
}
}
static void tegra3_idle_enter_lp2_cpu_n(struct cpuidle_device *dev,
- struct cpuidle_state *state, unsigned int request)
+ struct cpuidle_state *state, s64 request)
{
#ifdef CONFIG_SMP
ktime_t entery_time;
@@ -334,7 +333,7 @@ static void tegra3_idle_enter_lp2_cpu_n(struct cpuidle_device *dev,
void tegra3_idle_lp2(struct cpuidle_device *dev,
struct cpuidle_state *state)
{
- unsigned int request = ktime_to_us(tick_nohz_get_sleep_length());
+ s64 request = ktime_to_us(tick_nohz_get_sleep_length());
bool last_cpu = tegra_set_cpu_in_lp2(dev->cpu);
cpu_pm_enter();