diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-21 16:06:08 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:57 -0800 |
| commit | 6031a0cd1a2391a30e30a5edbcaccf5a1868969c (patch) | |
| tree | 46b2c748f1bce772217468b3cbae1295c7d002e2 /arch/arm/mach-tegra/cpuidle.h | |
| parent | 235b7a5f627819f05e538caf5f21220b8450ec73 (diff) | |
ARM: tegra3: power: Add LP2 power mode support for CPU 0
Add support for forced Tegra3 LP2 low power mode on the boot processor
(CPU 0) via the cluster control interface when all others are offline.
Switching to the LP CPU mode is also enabled with this change.
LP2 in idle and LP2 mode on the secondary processors is not yet
supported.
Change-Id: Icb898729f093be5e006c413f701532dd45228687
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: Rd5d8c2b0addfd6853033670b992ae082e4a0d9c8
Diffstat (limited to 'arch/arm/mach-tegra/cpuidle.h')
| -rw-r--r-- | arch/arm/mach-tegra/cpuidle.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index 5d0c3d695342..d5e1e3e0152e 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -35,12 +35,25 @@ bool tegra2_lp2_is_allowed(struct cpuidle_device *dev, int tegra2_lp2_debug_show(struct seq_file *s, void *data); #endif #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC +void tegra3_idle_lp2(struct cpuidle_device *dev, struct cpuidle_state *state); +void tegra3_cpu_idle_stats_lp2_ready(unsigned int cpu); +void tegra3_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us); +bool tegra3_lp2_is_allowed(struct cpuidle_device *dev, + struct cpuidle_state *state); +#ifdef CONFIG_DEBUG_FS +int tegra3_lp2_debug_show(struct seq_file *s, void *data); +#endif +#endif static inline void tegra_cpu_idle_stats_lp2_ready(unsigned int cpu) { #ifdef CONFIG_ARCH_TEGRA_2x_SOC tegra2_cpu_idle_stats_lp2_ready(cpu); #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC + tegra3_cpu_idle_stats_lp2_ready(cpu); +#endif } static inline void tegra_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us) @@ -48,6 +61,9 @@ static inline void tegra_cpu_idle_stats_lp2_time(unsigned int cpu, s64 us) #ifdef CONFIG_ARCH_TEGRA_2x_SOC tegra2_cpu_idle_stats_lp2_time(cpu, us); #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC + tegra3_cpu_idle_stats_lp2_time(cpu, us); +#endif } static inline void tegra_idle_lp2(struct cpuidle_device *dev, @@ -56,6 +72,9 @@ static inline void tegra_idle_lp2(struct cpuidle_device *dev, #ifdef CONFIG_ARCH_TEGRA_2x_SOC tegra2_idle_lp2(dev, state); #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC + tegra3_idle_lp2(dev, state); +#endif } static inline bool tegra_lp2_is_allowed(struct cpuidle_device *dev, @@ -64,6 +83,9 @@ static inline bool tegra_lp2_is_allowed(struct cpuidle_device *dev, #ifdef CONFIG_ARCH_TEGRA_2x_SOC return tegra2_lp2_is_allowed(dev, state); #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC + return tegra3_lp2_is_allowed(dev, state); +#endif } #ifdef CONFIG_DEBUG_FS @@ -72,6 +94,9 @@ static inline int tegra_lp2_debug_show(struct seq_file *s, void *data) #ifdef CONFIG_ARCH_TEGRA_2x_SOC return tegra2_lp2_debug_show(s, data); #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC + return tegra3_lp2_debug_show(s, data); +#endif } #endif |