diff options
| author | Bibek Basu <bbasu@nvidia.com> | 2014-10-15 17:37:04 +0530 |
|---|---|---|
| committer | Matthew Pedro <mapedro@nvidia.com> | 2014-12-10 11:01:06 -0800 |
| commit | 38dd845143a65b22a1ddce29d9c1e5c090767c30 (patch) | |
| tree | cb334aa2d98b38017ede3582e195ab73ef3889e0 /arch/arm/mach-tegra/dvfs.h | |
| parent | 88991937f3c15b46e8145d2a8a13baeaf9307a8d (diff) | |
arm: tegra12: add support for 0x80 embedded SKU
Added DVFS support for CD575MI SKU 0x80 always on personality
CPU DVFS: Max Freq 1912Mhz. Switch to PLLX below 0 DegC
and fixed voltage
SOC DVFS: Vmax 1000mv constant. Lesser freq below 0 DegC
EMC dvfs max freq 792Mhz
GPU DVFS: Max Freq 756Mhz and thermal bump up of voltage
by 50mv below 0 DegC
Bug 1563635
Change-Id: Ifa66f4d9905be120a3534acd8f3ab9c2b58eea37
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/557951
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/dvfs.h')
| -rw-r--r-- | arch/arm/mach-tegra/dvfs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/dvfs.h b/arch/arm/mach-tegra/dvfs.h index c891786c642c..5bdfa05cd70e 100644 --- a/arch/arm/mach-tegra/dvfs.h +++ b/arch/arm/mach-tegra/dvfs.h @@ -140,6 +140,8 @@ enum dfll_range { /* DFLL usage is under thermal cooling device control */ #define TEGRA_USE_DFLL_CDEV_CNTRL 3 +extern int tegra_override_dfll_range; + /* DVFS settings specific for DFLL clock source */ struct dvfs_dfll_data { u32 tune0; |