diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-10-25 23:36:26 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:49:57 -0800 |
| commit | f7608a5f206b42f1b598e6f0b1c9d03594688f98 (patch) | |
| tree | b0a443e7b0db17388d889a883785d54aa9030534 /arch/arm/mach-tegra/dvfs.h | |
| parent | 529ed3a4eef9a419faefc700565cd442c102e778 (diff) | |
ARM: tegra: dvfs: Optimize Tegra3 VDD_CPU control in LP mode
Optimized Tegra3 VDD_CPU control when VDD_CPU target is set to zero,
which could happen only while CPU is in LP mode (and CPU regulator
output is turned off by side-band signal, anyway):
- Ignore VDD_CPU dependency on VDD_CORE while VDD_CPU target is zero
- Allow VDD_CPU one step change to zero (i.e., to minimum voltage set
by constraints) after entry to LP mode
- Allow VDD_CPU one step change to the predicted G mode target before
exit from LP mode
(cherry picked from commit 5826f3e28867207b5dad1c50795de8275d1af872)
(cherry picked from commit 79c531421dfc65e27af657fd12b64c4187c67827)
Change-Id: I3c469132034a431d2e9b8727d11d604c306122f1
Reviewed-on: http://git-master/r/63357
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R4c4f6e79decddb778f58cb5eef853a4c9d52ca94
Diffstat (limited to 'arch/arm/mach-tegra/dvfs.h')
| -rw-r--r-- | arch/arm/mach-tegra/dvfs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/dvfs.h b/arch/arm/mach-tegra/dvfs.h index d867ac4299cf..60f8d51c6f1a 100644 --- a/arch/arm/mach-tegra/dvfs.h +++ b/arch/arm/mach-tegra/dvfs.h @@ -49,6 +49,7 @@ struct dvfs_rail { int max_millivolts; int nominal_millivolts; int step; + bool jmp_to_zero; bool disabled; bool updating; bool resolving_to; |