diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2010-12-07 11:19:20 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:02 -0800 |
| commit | 816ab05de4f2171e20171db01fa916634ed7bee6 (patch) | |
| tree | 963ce2c1724c63598deb279d9f6ed54cfc93d1e3 /arch/arm/mach-tegra/hotplug.c | |
| parent | 7d8324d8f3dfc27407d7514fcbd605649c9bd210 (diff) | |
[ARM/tegra] Add Tegra3 support
Bug 764354
Original-Change-Id: I8a390eb4dae87dceacb97461f23d13554868b046
Reviewed-on: http://git-master/r/12228
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I8e6b8303898796419fb5a759cd16edff9aeac081
Rebase-Id: R2866240384c6c24f46bd7ef54bc3dc9140d9e96b
Diffstat (limited to 'arch/arm/mach-tegra/hotplug.c')
| -rw-r--r-- | arch/arm/mach-tegra/hotplug.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c index 97d9746cee25..d54b8f93dace 100644 --- a/arch/arm/mach-tegra/hotplug.c +++ b/arch/arm/mach-tegra/hotplug.c @@ -17,6 +17,8 @@ #include "sleep.h" +#define CPU_CLOCK(cpu) (0x1<<(8+cpu)) + #define CLK_RST_CONTROLLER_CLK_CPU_CMPLX \ (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x4c) #define CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET \ @@ -24,17 +26,25 @@ #define CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR \ (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x344) +#ifdef CONFIG_ARCH_TEGRA_2x_SOC +/* For Tegra2 use the software-written value of the reset register for status.*/ +#define CLK_RST_CONTROLLER_CPU_CMPLX_STATUS CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET +#else +#define CLK_RST_CONTROLLER_CPU_CMPLX_STATUS \ + (IO_ADDRESS(TEGRA_CLK_RESET_BASE) + 0x470) +#endif + int platform_cpu_kill(unsigned int cpu) { unsigned int reg; do { - reg = readl(CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET); + reg = readl(CLK_RST_CONTROLLER_CPU_CMPLX_STATUS); cpu_relax(); } while (!(reg & (1<<cpu))); reg = readl(CLK_RST_CONTROLLER_CLK_CPU_CMPLX); - writel(reg | (1<<(8+cpu)), CLK_RST_CONTROLLER_CLK_CPU_CMPLX); + writel(reg | CPU_CLOCK(cpu), CLK_RST_CONTROLLER_CLK_CPU_CMPLX); return 1; } |