diff options
| author | Bo Yan <byan@nvidia.com> | 2012-04-24 18:18:24 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:10:58 -0700 |
| commit | bf241850a0e2bc4d639d1124d5b6948a1bbb4497 (patch) | |
| tree | 99bef7301a3e93acc9157bde40b779cb183ad516 /arch/arm/mach-tegra/hotplug.c | |
| parent | 508ac250a142aaee580d76f7c806cbaea4a5bd11 (diff) | |
ARM: tegra11: Disable d-cache before power gating
For Cortex A15, the power down sequence requires D cache be
disabled before flushing cache and power gating the CPU.
bug 971396
Change-Id: I15c169c82780022877a0a49aa6403a9e5fd9d83f
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/98581
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Rebase-Id: R9af0f0af47ebb7260215b314cb958098a029183c
Diffstat (limited to 'arch/arm/mach-tegra/hotplug.c')
| -rw-r--r-- | arch/arm/mach-tegra/hotplug.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/hotplug.c b/arch/arm/mach-tegra/hotplug.c index f91c84c75c5c..7d8bf518d298 100644 --- a/arch/arm/mach-tegra/hotplug.c +++ b/arch/arm/mach-tegra/hotplug.c @@ -42,8 +42,24 @@ void tegra_cpu_die(unsigned int cpu) cpu = cpu_logical_map(cpu); #ifndef CONFIG_ARCH_TEGRA_2x_SOC +#ifdef CONFIG_ARCH_TEGRA_11x_SOC + unsigned int r; +#endif + /* Disable GIC CPU interface for this CPU. */ tegra_gic_cpu_disable(false); + +#ifdef CONFIG_ARCH_TEGRA_11x_SOC + /* disable cache */ + asm volatile( + " mrc p15, 0, %0, c1, c0, 0\n" + " bic %0, %0, #0x4 \n" + " mcr p15, 0, %0, c1, c0, 0\n" + : "=r" (r) + : "r" (r) + : "cc" + ); +#endif #endif /* Flush the L1 data cache. */ |