diff options
| author | Animesh Kishore <ankishore@nvidia.com> | 2014-02-20 16:24:41 +0530 |
|---|---|---|
| committer | Animesh Kishore <ankishore@nvidia.com> | 2014-02-27 02:24:08 -0800 |
| commit | 1f0500e1e9ab9e2d81e3b0f12a22ec7d3811e1ad (patch) | |
| tree | 077bb78c2d6c7aa74ce4388b1ef1473e73ee7d0e /arch/arm/mach-tegra/include/mach/dc.h | |
| parent | 6a4305ffaeb59f8e14624d13b78fee50588e15de (diff) | |
arm: tegra: ardbeg: Support per lane dp config
Add suport to provide asymmetric lane configuration
for display port fast link training.
Bug 1453390
Bug 1453404
Change-Id: I7e50eb6fdac65c2fedc9572688a45b0ae2d6dace
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/369886
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/dc.h')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/dc.h | 31 |
1 files changed, 26 insertions, 5 deletions
diff --git a/arch/arm/mach-tegra/include/mach/dc.h b/arch/arm/mach-tegra/include/mach/dc.h index c91a558b34e4..6c1246107b40 100644 --- a/arch/arm/mach-tegra/include/mach/dc.h +++ b/arch/arm/mach-tegra/include/mach/dc.h @@ -890,12 +890,33 @@ struct tegra_hdmi_out { int n_tmds_config; }; +enum { + DRIVE_CURRENT_L0 = 0, + DRIVE_CURRENT_L1 = 1, + DRIVE_CURRENT_L2 = 2, + DRIVE_CURRENT_L3 = 3, +}; + +enum { + PRE_EMPHASIS_L0 = 0, + PRE_EMPHASIS_L1 = 1, + PRE_EMPHASIS_L2 = 2, + PRE_EMPHASIS_L3 = 3, +}; + +enum { + POST_CURSOR2_L0 = 0, + POST_CURSOR2_L1 = 1, + POST_CURSOR2_L2 = 2, + POST_CURSOR2_L3 = 3, +}; + struct tegra_dc_dp_lt_settings { - int drive_current; - int lane_preemphasis; - int post_cursor; - int tx_pu; - int load_adj; + u32 drive_current[4]; /* Entry for each lane */ + u32 lane_preemphasis[4]; /* Entry for each lane */ + u32 post_cursor[4]; /* Entry for each lane */ + u32 tx_pu; + u32 load_adj; }; struct tegra_dp_out { |