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authorStefan Agner <stefan.agner@toradex.com>2014-06-24 13:47:49 +0200
committerStefan Agner <stefan.agner@toradex.com>2014-07-21 14:26:21 +0200
commit29b19ff42a7d4c609f824c13ca139eef7332ff1f (patch)
treeb23a3d8879cc473d9804582ceee93e24452119f6 /arch/arm/mach-tegra/include/mach
parentff09771639a39c834f364a75faa49bc44bac901e (diff)
mmc: tegra: use 1.8V quirk only on affected instances
The 1.8V quirk also affected the internal eMMC which disabled newer modes such as SDR50, SDR104 and DDR50. This in turn lead to an out of spec usage since the clock was still 50MHz. By creating a no_1v8 field in the platform data we can now enable this work around on a per-instance basis. Hence we enable the quirk only on the controllers which are connected to the external SD-slots.
Diffstat (limited to 'arch/arm/mach-tegra/include/mach')
-rw-r--r--arch/arm/mach-tegra/include/mach/sdhci.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/sdhci.h b/arch/arm/mach-tegra/include/mach/sdhci.h
index e307506eb40b..00fd5c678b5b 100644
--- a/arch/arm/mach-tegra/include/mach/sdhci.h
+++ b/arch/arm/mach-tegra/include/mach/sdhci.h
@@ -33,6 +33,7 @@ struct tegra_sdhci_platform_data {
int wp_gpio;
int power_gpio;
int is_8bit;
+ int no_1v8;
int pm_flags;
int pm_caps;
unsigned int max_clk_limit;