diff options
| author | Hiroshi DOYU <hdoyu@nvidia.com> | 2011-11-11 14:37:25 +0200 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2011-12-21 15:30:49 +0530 |
| commit | e315818c68b882c934f594586cbb207b9dfaac37 (patch) | |
| tree | 9595130c348542858c45dc4c9468dbd86c655de9 /arch/arm/mach-tegra/iovmm-smmu.c | |
| parent | 620d4634a000942e97b3ed158ba4bb6be8231889 (diff) | |
ARM: tegra: smmu: Remove unnecessary memory barrier
memory barrier(wmb()) doesn't affect transaction among AHB/APB bus
transaction but only register read-back does.
Change-Id: If8da79bc3f536bac025e408afe0f26cca2274f86
Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com>
Reviewed-on: http://git-master/r/66355
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/iovmm-smmu.c')
| -rw-r--r-- | arch/arm/mach-tegra/iovmm-smmu.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/iovmm-smmu.c b/arch/arm/mach-tegra/iovmm-smmu.c index bf0f1042d70b..1f67096736a2 100644 --- a/arch/arm/mach-tegra/iovmm-smmu.c +++ b/arch/arm/mach-tegra/iovmm-smmu.c @@ -331,8 +331,12 @@ struct smmu_device { outer_flush_range(_pa_, _pa_+(size_t)(size)); \ } while (0) -#define FLUSH_SMMU_REGS(smmu) \ - do { wmb(); (void)readl((smmu)->regs + MC_SMMU_CONFIG_0); } while (0) +/* + * Any interaction between any block on PPSB and a block on APB or AHB + * must have these read-back to ensure the APB/AHB bus transaction is + * complete before initiating activity on the PPSB block. + */ +#define FLUSH_SMMU_REGS(smmu) (void)readl((smmu)->regs + MC_SMMU_CONFIG_0) /* * Flush all TLB entries and all PTC entries |