diff options
| author | Sanjay Singh Rawat <srawat@nvidia.com> | 2011-11-15 11:52:47 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:52:38 -0800 |
| commit | 1c8bb763ce219bd738ffa1d95946208c54164cec (patch) | |
| tree | 9cd86de2e4cf02d77203ace25a702763feee800d /arch/arm/mach-tegra/pinmux-t2-tables.c | |
| parent | a5a29b0d4b05ad92ad8630fb702ea8563eb7f230 (diff) | |
arm: tegra: pinmux: correct pinmux setting for DDC and PTA group
The safe function setting is not correct for the pingroup
Bug 901383
Change-Id: I5a7340b0d4951d844e3b1824edbfc6de4fec0006
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/64371
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rb9e9261e3725f21bcb97edaf71d16f7c0aed2eaa
Diffstat (limited to 'arch/arm/mach-tegra/pinmux-t2-tables.c')
| -rw-r--r-- | arch/arm/mach-tegra/pinmux-t2-tables.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c index a2659f93b98f..3a39f45cb57e 100644 --- a/arch/arm/mach-tegra/pinmux-t2-tables.c +++ b/arch/arm/mach-tegra/pinmux-t2-tables.c @@ -142,7 +142,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE PINGROUP(DAP2, PA2, AUDIO, DAP2, TWC, RSVD, GMI, DAP2, 0x14, 8, 0x88, 22, 0xA0, 12),\ PINGROUP(DAP3, PP0, BB, DAP3, RSVD, RSVD, RSVD, DAP3, 0x14, 9, 0x88, 24, 0xA0, 14),\ PINGROUP(DAP4, PP4, UART, DAP4, RSVD, GMI, RSVD, DAP4, 0x14, 10, 0x88, 26, 0xA0, 16),\ - PINGROUP(DDC, INVALID, LCD, I2C2, RSVD, RSVD, RSVD, RSVD4, 0x18, 31, 0x88, 0, 0xB0, 28),\ + PINGROUP(DDC, INVALID, LCD, I2C2, RSVD, RSVD, RSVD, RSVD, 0x18, 31, 0x88, 0, 0xB0, 28),\ PINGROUP(DTA, PT4, VI, RSVD, SDIO2, VI, RSVD, RSVD4, 0x14, 11, 0x84, 20, 0xA0, 18),\ PINGROUP(DTB, PT2, VI, RSVD, RSVD, VI, SPI1, RSVD1, 0x14, 12, 0x84, 22, 0xA0, 20),\ PINGROUP(DTC, PD6, VI, RSVD, RSVD, VI, RSVD, RSVD1, 0x14, 13, 0x84, 26, 0xA0, 22),\ @@ -209,7 +209,7 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE PINGROUP(LVS, PJ4, LCD, DISPLAYA, DISPLAYB, XIO, RSVD, RSVD4, 0x1C, 26, 0x90, 24, 0xAC, 22),\ PINGROUP(OWC, INVALID, SYS, OWR, RSVD, RSVD, RSVD, OWR, 0x14, 31, 0x84, 8, 0xB0, 30),\ PINGROUP(PMC, PBB0, SYS, PWR_ON, PWR_INTR, RSVD, RSVD, PWR_ON, 0x14, 23, 0x98, 18, -1, -1),\ - PINGROUP(PTA, PT5, NAND, I2C2, HDMI, GMI, RSVD, RSVD4, 0x14, 24, 0x98, 22, 0xA4, 4),\ + PINGROUP(PTA, PT5, NAND, I2C2, HDMI, GMI, RSVD, RSVD, 0x14, 24, 0x98, 22, 0xA4, 4),\ PINGROUP(RM, PC5, UART, I2C, RSVD, RSVD, RSVD, RSVD4, 0x14, 25, 0x80, 14, 0xA4, 0),\ PINGROUP(SDB, PA7, SD, UARTA, PWM, SDIO3, SPI2, PWM, 0x20, 15, 0x8C, 10, -1, -1),\ PINGROUP(SDC, PB7, SD, PWM, TWC, SDIO3, SPI3, TWC, 0x18, 1, 0x8C, 12, 0xAC, 28),\ |