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authorSeshendra Gadagottu <sgadagottu@nvidia.com>2013-01-03 18:35:39 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:48:42 -0700
commit28f0a97ebe887ec4c367b3fc3d2452747e21670d (patch)
tree43ade09a99236c8f90e55dae3c558b1712401a4c /arch/arm/mach-tegra/pm.h
parentcec6d66b6a1d52a5bf5a52aabd8f1ac0a456df44 (diff)
ARM: tegra: Fix cluster switch issue for T14X
Getting cluster ID by reading MPIDR register is not working for T14x. For this issue, HW bug 1212957 is submitted. SW will use FLOWCONTROLLER_CLUSTER_CONTROL register to know the active clusterID. Change-Id: Ib1c02e27b39fba10d4d8027f6a90bae7c3024d31 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/188498 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.h')
-rw-r--r--arch/arm/mach-tegra/pm.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h
index 3a2b719441b0..4a63ca161408 100644
--- a/arch/arm/mach-tegra/pm.h
+++ b/arch/arm/mach-tegra/pm.h
@@ -94,6 +94,11 @@ bool tegra_set_cpu_in_pd(int cpu);
int tegra_suspend_dram(enum tegra_suspend_mode mode, unsigned int flags);
+#ifdef CONFIG_ARCH_TEGRA_14x_SOC
+#define FLOW_CTRL_CLUSTER_CONTROL \
+ (IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + 0x2c)
+#endif
+
#define FLOW_CTRL_CPU_PWR_CSR \
(IO_ADDRESS(TEGRA_FLOW_CTRL_BASE) + 0x38)
#define FLOW_CTRL_CPU_PWR_CSR_RAIL_ENABLE 1
@@ -146,12 +151,17 @@ static inline bool is_g_cluster_present(void)
static inline unsigned int is_lp_cluster(void)
{
unsigned int reg;
+#ifdef CONFIG_ARCH_TEGRA_14x_SOC
+ reg = readl(FLOW_CTRL_CLUSTER_CONTROL);
+ return reg & 1; /* 0 == G, 1 == LP*/
+#else
asm("mrc p15, 0, %0, c0, c0, 5\n"
"ubfx %0, %0, #8, #4"
: "=r" (reg)
:
: "cc");
return reg ; /* 0 == G, 1 == LP*/
+#endif
}
int tegra_cluster_control(unsigned int us, unsigned int flags);
void tegra_cluster_switch_prolog(unsigned int flags);