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authorAlex Frid <afrid@nvidia.com>2013-08-01 22:43:18 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 13:39:19 -0700
commita98e68c16378962b11970a281857d943ddb5f294 (patch)
tree952697a7524758eef2e4c6e96ddfcf400d634da0 /arch/arm/mach-tegra/pm.h
parentdc117f3887970192282dfb78d3f9b0f40aee57ec (diff)
ARM: tegra: power: Update DFLL bypass start/suspend/resume
- Initialized DFLL before legacy dvfs if DFLL bypass is enabled (reversed common initialization order: first legacy dvfs - then DFLL, since DFLL bypass device is used as regulator by legacy dvfs) - Isolated DFLL output from voltage supply on entry to any state with CPU cluster powered down (suspend, cluster idle), and resumed normal operation on exit. This is necessary to avoid unpredictable effect of DFLL output on CPU voltage during power transitions. Bug 1310396 Change-Id: Ie42b92633367337ebc08200ab425baaf9043d133 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/257346 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/pm.h')
-rw-r--r--arch/arm/mach-tegra/pm.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h
index 7f605f908379..bccbde1968fc 100644
--- a/arch/arm/mach-tegra/pm.h
+++ b/arch/arm/mach-tegra/pm.h
@@ -90,6 +90,9 @@ struct tegra_suspend_platform_data {
unsigned long min_residency_mc_clk;
bool usb_vbus_internal_wake; /* support for internal vbus wake */
bool usb_id_internal_wake; /* support for internal id wake */
+
+ void (*suspend_dfll_bypass)(void);
+ void (*resume_dfll_bypass)(void);
};
/* clears io dpd settings before kernel code */