summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/sleep-t30.S
diff options
context:
space:
mode:
authorGreg Heinrich <gheinrich@nvidia.com>2013-07-25 09:09:13 +0100
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 13:39:48 -0700
commit737f5c212b8de3d084e44d3bf6eee8cd80ad61ad (patch)
treedf6f7762b49f2aefcd88c837f79d753b1190b204 /arch/arm/mach-tegra/sleep-t30.S
parent7d07bc87760f0956e7c5ae884fa62dbbf4fc52d1 (diff)
arm:tegra14: keep PLL-C ON if needed on voice call
The LP1BB entry logic that checks the EMC source to determine if PLL-C must be ON in LP1BB must also apply to the case when there is an ongoing voice call. Failing to do so results in PLL-C being cut unconditionally, which may result in baseband crashes. bug 1331131 Change-Id: Iee416b3f1f1e030ae3f578f216ea372827271c94 Signed-off-by: Greg Heinrich <gheinrich@nvidia.com> Reviewed-on: http://git-master/r/253280 (cherry picked from commit f69519fcaff3a615335f2630620d8ec3b8f22d49) Reviewed-on: http://git-master/r/258607 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t30.S')
-rw-r--r--arch/arm/mach-tegra/sleep-t30.S12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S
index 67a1f9ea09a5..73d2aabd98f6 100644
--- a/arch/arm/mach-tegra/sleep-t30.S
+++ b/arch/arm/mach-tegra/sleep-t30.S
@@ -1073,13 +1073,19 @@ lp1_volt_skip:
ldr r11, [r4, #PMC_SCRATCH37] @ load the LP1 flags
tst r11, #TEGRA_POWER_LP1_AUDIO @ check if voice call is going on
+#if !defined(CONFIG_ARCH_TEGRA_14x_SOC)
bne powerdown_pll_cx @ if yes, do not turn off pll-p/pll-a
-
-#if defined(CONFIG_ARCH_TEGRA_14x_SOC)
- /* BB needs PLLP and EMC in LP1BB */
+#else
+ /*
+ * BB needs PLLP and EMC on voice call/LP1BB. EMC may be clocked by
+ * PLLC so we need to check the EMC source PLL to determine whether
+ * PLLC can be turned OFF
+ */
+ bne lp1bb_emc_source_check
ldr r0, lp_enter_state
cmp r0, #PMC_LP_STATE_LP1BB @ check if we're entering LP1BB
bne powerdown_pll_pacx @ if not, turn off plls p/a/c/x
+lp1bb_emc_source_check:
/* find source pll of EMC */
ldr r0, [r5, #CLK_RESET_CLK_SOURCE_EMC]
mov r0, r0, lsr #0x1d