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authorPrashant Malani <pmalani@nvidia.com>2013-02-16 16:31:46 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 13:01:07 -0700
commit903bc721243783d779a7cc5af21777477b833449 (patch)
tree9651b3a5cf23bb2d4e939158586e276e1a04d018 /arch/arm/mach-tegra/sleep-t30.S
parentbad3042d73ed8a2dbc54b2b85ff98a6a47097dc6 (diff)
ARM: tegra14x: Use microsecond timers in LP code
Use NVidia microsecond timers instead of wait loops as they provide higher resolution and prevent unnecessary delays. Change-Id: I2b58a773c24e1614638d711afb51ac682cf3af69 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/201494 (cherry picked from commit 00d261b842c3d006c4c53e52732276e02826b7cf) Reviewed-on: http://git-master/r/204898 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-t30.S')
-rw-r--r--arch/arm/mach-tegra/sleep-t30.S33
1 files changed, 19 insertions, 14 deletions
diff --git a/arch/arm/mach-tegra/sleep-t30.S b/arch/arm/mach-tegra/sleep-t30.S
index 8edcde56251a..fd36471b3ea1 100644
--- a/arch/arm/mach-tegra/sleep-t30.S
+++ b/arch/arm/mach-tegra/sleep-t30.S
@@ -744,11 +744,15 @@ tegra3_tear_down_core:
* PMC_IPC_STS register is queried again
*/
lp0_delayed_entry:
- /* Wait for a few ticks for this to stabilize */
- ldr r0, =0x3000
-wait_stable:
- subs r0, r0, #1
- bne wait_stable
+ /* Use us timer to wait for 10 ms
+ * FIXME: we need to increase this timeout according to BB
+ * requirements.
+ */
+ mov32 r7, TEGRA_TMRUS_BASE
+ wait_for_us r1, r7, r9
+ ldr r2, =10000
+ add r1, r1, r2
+ wait_until r1, r7, r9
ldr r0, [r4, #PMC_IPC_STS]
tst r0, #PMC_IPC_STS_MEM_REQ | PMC_IPC_STS_MEM_REQ_SOON
@@ -818,21 +822,22 @@ tegra148_set_mem_req_interrupt:
orrne r0, r0, #PMC_WAKE2_BB_MEM_REQ
str r0, [r4, #PMC_WAKE2_LEVEL]
- /* Wait for a few ticks for this to stabilize */
- ldr r0, =0x300
-wait_stable3:
- subs r0, r0, #1
- bne wait_stable3
+ /* Wait for 1ms for write to take effect */
+ mov32 r7, TEGRA_TMRUS_BASE
+ wait_for_us r1, r7, r9
+ add r1, r1, #1000
+ wait_until r1, r7, r9
/* Program the auto_wake_lvl regsiters */
ldr r0, [r4, #PMC_AUTO_WAKE_LVL]
orr r0, r0, #1
str r0, [r4, #PMC_AUTO_WAKE_LVL]
- ldr r0, =0x300
-wait_stable2:
- subs r0, r0, #1
- bne wait_stable2
+ /* Wait for 1ms for write to take effect */
+ mov32 r7, TEGRA_TMRUS_BASE
+ wait_for_us r1, r7, r9
+ add r1, r1, #1000
+ wait_until r1, r7, r9
/* Configure mem_req active low to be wake event */
ldr r0, [r4, #PMC_WAKE2_MASK]