diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2011-07-21 12:24:05 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:46:56 -0800 |
| commit | 5b5f0382c47f1b697761e8406530ea7abf8f6455 (patch) | |
| tree | 1296d3c89f59eb6773fd07302542aeeb5ff7eba2 /arch/arm/mach-tegra/sleep.h | |
| parent | 36c09236df8fbe389ebbe58395e808c31b098013 (diff) | |
ARM: tegra: power: Consolidate power management flags
Consolidate all of the power management control flags in one
header and adjust the values of the software flags so that they
do not conflict with the values of the hardware flags.
Change-Id: I7971d274946d84dcc50bd9d9e0190091ebbefa2e
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R29d2420a74f977c16f73b1abd9ca7470695a53f4
Diffstat (limited to 'arch/arm/mach-tegra/sleep.h')
| -rw-r--r-- | arch/arm/mach-tegra/sleep.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 30fc2e5e245c..49de287da2c3 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -25,6 +25,15 @@ #include <mach/iomap.h> +#define TEGRA_POWER_SDRAM_SELFREFRESH (1 << 26) /* SDRAM is in self-refresh */ +#define TEGRA_POWER_HOTPLUG_SHUTDOWN (1 << 27) /* Hotplug shutdown */ +#define TEGRA_POWER_CLUSTER_G (1 << 28) /* G CPU */ +#define TEGRA_POWER_CLUSTER_LP (1 << 29) /* LP CPU */ +#define TEGRA_POWER_CLUSTER_MASK (TEGRA_POWER_CLUSTER_G | \ + TEGRA_POWER_CLUSTER_LP) +#define TEGRA_POWER_CLUSTER_IMMEDIATE (1 << 30) /* Immediate wake */ +#define TEGRA_POWER_CLUSTER_FORCE (1 << 31) /* Force switch */ + #define TEGRA_IRAM_CODE_AREA (TEGRA_IRAM_BASE + SZ_4K) /* PMC_SCRATCH37-39 and 41 are used for tegra_pen_lock in Tegra2 idle */ @@ -35,9 +44,11 @@ /* PMC_SCRATCH41 stores the reset vector of the CPU after LP0 and LP1 */ #define PMC_SCRATCH41 0x140 +#ifdef CONFIG_ARCH_TEGRA_2x_SOC #define CPU_RESETTABLE 2 #define CPU_RESETTABLE_SOON 1 #define CPU_NOT_RESETTABLE 0 +#endif #define FLOW_CTRL_HALT_CPU0_EVENTS 0x0 #define FLOW_CTRL_WAITEVENT (2 << 29) |