diff options
| author | Terry Wang <terwang@nvidia.com> | 2014-02-19 18:20:39 +0800 |
|---|---|---|
| committer | Laxman Dewangan <ldewangan@nvidia.com> | 2014-02-26 05:35:15 -0800 |
| commit | aea2153a157bb2681470cf9e2ab03b10264926ad (patch) | |
| tree | e48758379f5a8c33790211883aba2783fabbdc6e /arch/arm/mach-tegra/tegra12_emc.c | |
| parent | cdfb7124fb0d6f8beb80dd4a5ec08b4824e25c95 (diff) | |
arm: tegra12: disable MC Holdoff for some clients
Disable MC Holdoff for HYST_VDETPER, HYST_VDEMCER, HYST_VDEMBER,
HYST_VDEBSEVR, HYST_MSENCSRD, HYST_ISPRAB, HYST_ISPRA, HYST_VICSRD
Correct some incorrect clients name definitions
Bug 1440582
Change-Id: I0b50668218051a060062b565f82e45abff82d875
Signed-off-by: Terry Wang <terwang@nvidia.com>
Reviewed-on: http://git-master/r/369254
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra12_emc.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra12_emc.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/arm/mach-tegra/tegra12_emc.c b/arch/arm/mach-tegra/tegra12_emc.c index 7405d60dc541..2f5fb9720f75 100644 --- a/arch/arm/mach-tegra/tegra12_emc.c +++ b/arch/arm/mach-tegra/tegra12_emc.c @@ -1518,18 +1518,17 @@ module_param_cb(pasr_enable, &tegra12_pasr_enable_ops, &pasr_enable, 0644); void tegra12_mc_holdoff_enable(void) { - mc_writel(HYST_MSENCSRD | HYST_DISPLAYHCB | HYST_DISPLAYHC | - HYST_DISPLAY0CB | HYST_DISPLAY0C | YST_DISPLAY0BB | - YST_DISPLAY0B | YST_DISPLAY0AB | YST_DISPLAY0A, + mc_writel(HYST_DISPLAYHCB | HYST_DISPLAYHC | + HYST_DISPLAY0CB | HYST_DISPLAY0C | HYST_DISPLAY0BB | + HYST_DISPLAY0B | HYST_DISPLAY0AB | HYST_DISPLAY0A, MC_EMEM_ARB_HYSTERESIS_0_0); - mc_writel(HYST_VDEDBGW | HYST_VDEBSEVW | HYST_MSENCSWR | - YST_VDETPER | YST_VDEMCER | YST_VDEMBER | YST_VDEBSEVR, + mc_writel(HYST_VDEDBGW | HYST_VDEBSEVW | HYST_MSENCSWR, MC_EMEM_ARB_HYSTERESIS_1_0); mc_writel(HYST_DISPLAYT | HYST_GPUSWR | HYST_ISPWBB | - HYST_ISPWAB | HYST_ISPRAB | YST_ISPWB | YST_ISPWA | - YST_ISPRA | YST_VDETPMW | YST_VDEMBEW, + HYST_ISPWAB | HYST_ISPWB | HYST_ISPWA | + HYST_VDETPMW | HYST_VDEMBEW, MC_EMEM_ARB_HYSTERESIS_2_0); - mc_writel(HYST_DISPLAYD | HYST_VIW | HYST_VICSWR | HYST_VICSRD, + mc_writel(HYST_DISPLAYD | HYST_VIW | HYST_VICSWR, MC_EMEM_ARB_HYSTERESIS_3_0); } |