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authorAlex Frid <afrid@nvidia.com>2014-03-07 21:47:21 -0800
committerYu-Huan Hsu <yhsu@nvidia.com>2014-03-10 11:41:20 -0700
commit7f456e32678fc14c65142219dc52360d80ce65ca (patch)
treeb4c6adf304b26adfc51850e39b5012e1771b8820 /arch/arm/mach-tegra/tegra13_dvfs.c
parent55204188e98f72a661edb62ed762047db12ca0b6 (diff)
ARM: tegra13: dvfs: Account for thermal floor slack
When calculating VDD_CORE floor imposed by VDD_CPU took into account that in dfll-mode VDD_CPU rail will be at/above current thermal floor however low is voltage specified in DVFS table for target frequency. Set margin above thermal floor to 30mV. Lower dependency constraint at VDD_CPU level 900mV from 870mV to 830mV (this limit was statically set higher than necessary because 900mV is a cold floor, and thermal floor slack was not accounted in resolution algorithm until this commit). Bug 1461646 Change-Id: I11e00e7077496150e86f5ef56efede40febba1e9 Signed-off-by: Alex Frid <afrid@nvidia.com> Reviewed-on: http://git-master/r/379284 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra13_dvfs.c')
-rw-r--r--arch/arm/mach-tegra/tegra13_dvfs.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra13_dvfs.c b/arch/arm/mach-tegra/tegra13_dvfs.c
index f48ab5ca0967..da6981442dd1 100644
--- a/arch/arm/mach-tegra/tegra13_dvfs.c
+++ b/arch/arm/mach-tegra/tegra13_dvfs.c
@@ -135,7 +135,7 @@ static int tegra13_get_core_floor_mv(int cpu_mv)
{
if (cpu_mv < 800)
return 800;
- if (cpu_mv < 900)
+ if (cpu_mv <= 900)
return 830;
if (cpu_mv <= 1000)
return 870;
@@ -150,8 +150,16 @@ static int tegra13_get_core_floor_mv(int cpu_mv)
static int tegra13_dvfs_rel_vdd_cpu_vdd_core(struct dvfs_rail *vdd_cpu,
struct dvfs_rail *vdd_core)
{
+ int core_mv;
int cpu_mv = max(vdd_cpu->new_millivolts, vdd_cpu->millivolts);
- int core_mv = tegra13_get_core_floor_mv(cpu_mv);
+
+ if (tegra_dvfs_rail_is_dfll_mode(vdd_cpu)) {
+ /* 30mV thermal floor slack in dfll mode */
+ int cpu_floor_mv = tegra_dvfs_rail_get_thermal_floor(vdd_cpu);
+ cpu_mv = max(cpu_mv, cpu_floor_mv + 30);
+ }
+
+ core_mv = tegra13_get_core_floor_mv(cpu_mv);
core_mv = max(vdd_core->new_millivolts, core_mv);
if (vdd_cpu->resolving_to && (core_mv < vdd_core->millivolts))