diff options
| author | Ishwarya Balaji Gururajan <igururajan@nvidia.com> | 2014-05-22 15:17:34 -0700 |
|---|---|---|
| committer | Mandar Padmawar <mpadmawar@nvidia.com> | 2014-05-30 03:31:21 -0700 |
| commit | daf3abc3fc20fa936ca190fa7857c81eb812e344 (patch) | |
| tree | 9c34bc3563e6b141b9cf670b8e537abb86391447 /arch/arm/mach-tegra/tegra13_dvfs.c | |
| parent | 136101a8e3205b2063177baa317a811d5107a717 (diff) | |
ARM: T132: Update SoC dvfs table for clocks
update sbus, host1x, mselect and sor0 clocks in
SoC dvfs table to version p4v10
Bug 1442659
Change-Id: Ifa0127c9750d89a88af3e41a94d67bebf528286b
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/413420
Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com>
Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra13_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra13_dvfs.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/tegra13_dvfs.c b/arch/arm/mach-tegra/tegra13_dvfs.c index 0757d902521d..582db6a8ae3d 100644 --- a/arch/arm/mach-tegra/tegra13_dvfs.c +++ b/arch/arm/mach-tegra/tegra13_dvfs.c @@ -98,7 +98,7 @@ static struct dvfs_rail tegra13_dvfs_rail_vdd_cpu = { static struct dvfs_rail tegra13_dvfs_rail_vdd_core = { .reg_id = "vdd_core", - .version = "p4v7", + .version = "p4v10", .max_millivolts = 1400, .min_millivolts = 800, .step = VDD_SAFE_STEP, @@ -318,8 +318,8 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("emc", -1, -1, 1, KHZ, 264000, 348000, 384000, 384000, 528000, 528000, 1066000, 1200000), - CORE_DVFS("sbus", 0, 0, 1, KHZ, 1, 180000, 228000, 264000, 312000, 348000, 372000, 372000), - CORE_DVFS("sbus", 0, 1, 1, KHZ, 120000, 204000, 252000, 288000, 324000, 360000, 384000, 384000), + CORE_DVFS("sbus", 0, 0, 1, KHZ, 120000, 180000, 228000, 264000, 312000, 348000, 372000, 372000), + CORE_DVFS("sbus", 0, 1, 1, KHZ, 120000, 204000, 252000, 288000, 324000, 360000, 372000, 372000), CORE_DVFS("vic03", 0, 0, 1, KHZ, 180000, 240000, 324000, 420000, 492000, 576000, 648000, 720000), CORE_DVFS("vic03", 0, 1, 1, KHZ, 180000, 336000, 420000, 504000, 600000, 684000, 720000, 720000), @@ -336,8 +336,8 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("vde", 0, 0, 1, KHZ, 84000, 168000, 216000, 276000, 324000, 372000, 420000, 456000), CORE_DVFS("vde", 0, 1, 1, KHZ, 120000, 228000, 276000, 348000, 396000, 444000, 456000, 456000), - CORE_DVFS("host1x", 0, 0, 1, KHZ, 1, 156000, 204000, 240000, 348000, 372000, 408000, 408000), - CORE_DVFS("host1x", 0, 1, 1, KHZ, 108000, 156000, 204000, 240000, 348000, 384000, 444000, 444000), + CORE_DVFS("host1x", 0, 0, 1, KHZ, 108000, 156000, 204000, 240000, 348000, 372000, 408000, 408000), + CORE_DVFS("host1x", 0, 1, 1, KHZ, 108000, 156000, 204000, 252000, 348000, 384000, 408000, 408000), CORE_DVFS("vi", 0, 0, 1, KHZ, 1, 324000, 420000, 516000, 600000, 600000, 600000, 600000), CORE_DVFS("vi", 0, 1, 1, KHZ, 1, 420000, 480000, 600000, 600000, 600000, 600000, 600000), @@ -376,8 +376,7 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("nor", -1, -1, 1, KHZ, 102000, 102000, 102000, 102000, 102000, 102000, 102000, 102000), CORE_DVFS("pciex", -1, -1, 1, KHZ, 1, 250000, 250000, 500000, 500000, 500000, 500000, 500000), - CORE_DVFS("mselect", -1, 0, 1, KHZ, 1, 102000, 204000, 204000, 204000, 204000, 408000, 408000), - CORE_DVFS("mselect", -1, 1, 1, KHZ, 102000, 102000, 204000, 204000, 204000, 204000, 408000, 408000), + CORE_DVFS("mselect", -1, -1, 1, KHZ, 102000, 102000, 204000, 204000, 204000, 204000, 408000, 408000), /* Core voltages (mV): 800, 850, 900, 950, 1000, 1050, 1100, 1150 */ /* xusb clocks */ @@ -391,8 +390,7 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("hda", -1, -1, 1, KHZ, 1, 108000, 108000, 108000, 108000, 108000 , 108000, 108000), CORE_DVFS("hda2codec_2x", -1, -1, 1, KHZ, 1, 48000, 48000, 48000, 48000, 48000 , 48000, 48000), - CORE_DVFS("sor0", 0, 0, 1, KHZ, 1, 270000, 540000, 540000, 540000, 540000, 540000, 540000), - CORE_DVFS("sor0", 0, 1, 1, KHZ, 162000, 270000, 540000, 540000, 540000, 540000, 540000, 540000), + CORE_DVFS("sor0", 0, -1, 1, KHZ, 148500, 270000, 540000, 540000, 540000, 540000, 540000, 540000), OVRRD_DVFS("sdmmc1", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 204000), OVRRD_DVFS("sdmmc3", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 204000), |