diff options
| author | Ishwarya Balaji Gururajan <igururajan@nvidia.com> | 2014-05-26 17:56:46 -0700 |
|---|---|---|
| committer | Riham Haidar <rhaidar@nvidia.com> | 2014-06-09 18:14:33 -0700 |
| commit | f7194e62e8d9e78ae6478fc04fbd2b092ec53c81 (patch) | |
| tree | 794b4607d590235c9d8b30c63332b91bb9fc28d0 /arch/arm/mach-tegra/tegra13_dvfs.c | |
| parent | ae4d94d056d435767cef648d698645eb584164ba (diff) | |
ARM: T132: update SoC dvfs table for DSI, eDP
Update freq for DSI to 402M and sor to 162M
at 800mV. Update SoC dvfs revision to p4v1l.
Bug 1442659
Change-Id: I2f488d5d5bd2c0be577d4947f9f36d0c4a810596
Signed-off-by: Ishwarya Balaji Gururajan <igururajan@nvidia.com>
Reviewed-on: http://git-master/r/415053
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra13_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra13_dvfs.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra13_dvfs.c b/arch/arm/mach-tegra/tegra13_dvfs.c index 1dbbd8e3c468..5d97dd12230d 100644 --- a/arch/arm/mach-tegra/tegra13_dvfs.c +++ b/arch/arm/mach-tegra/tegra13_dvfs.c @@ -98,7 +98,7 @@ static struct dvfs_rail tegra13_dvfs_rail_vdd_cpu = { static struct dvfs_rail tegra13_dvfs_rail_vdd_core = { .reg_id = "vdd_core", - .version = "p4v10", + .version = "p4v11", .max_millivolts = 1400, .min_millivolts = 800, .step = VDD_SAFE_STEP, @@ -366,8 +366,8 @@ static struct dvfs core_dvfs_table[] = { /* Core voltages (mV): 800, 850, 900, 950, 1000, 1050, 1100, 1150 */ /* Clock limits for I/O peripherals */ - CORE_DVFS("dsia", -1, -1, 1, KHZ, 500000, 500000, 750000, 750000, 750000, 750000, 750000, 750000), - CORE_DVFS("dsib", -1, -1, 1, KHZ, 500000, 500000, 750000, 750000, 750000, 750000, 750000, 750000), + CORE_DVFS("dsia", -1, -1, 1, KHZ, 402000, 500000, 750000, 750000, 750000, 750000, 750000, 750000), + CORE_DVFS("dsib", -1, -1, 1, KHZ, 402000, 500000, 750000, 750000, 750000, 750000, 750000, 750000), CORE_DVFS("dsialp", -1, -1, 1, KHZ, 102000, 102000, 102000, 102000, 156000, 156000, 156000, 156000), CORE_DVFS("dsiblp", -1, -1, 1, KHZ, 102000, 102000, 102000, 102000, 156000, 156000, 156000, 156000), @@ -390,7 +390,7 @@ static struct dvfs core_dvfs_table[] = { CORE_DVFS("hda", -1, -1, 1, KHZ, 1, 108000, 108000, 108000, 108000, 108000 , 108000, 108000), CORE_DVFS("hda2codec_2x", -1, -1, 1, KHZ, 1, 48000, 48000, 48000, 48000, 48000 , 48000, 48000), - CORE_DVFS("sor0", 0, -1, 1, KHZ, 148500, 270000, 540000, 540000, 540000, 540000, 540000, 540000), + CORE_DVFS("sor0", 0, -1, 1, KHZ, 162500, 270000, 540000, 540000, 540000, 540000, 540000, 540000), OVRRD_DVFS("sdmmc1", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 204000), OVRRD_DVFS("sdmmc3", -1, -1, 1, KHZ, 1, 1, 82000, 82000, 136000, 136000, 136000, 204000), |