diff options
| author | mchourasia <mchourasia@nvidia.com> | 2011-06-22 12:56:15 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:37 -0800 |
| commit | 798e97fab289756ba1b066b3b8b81b2cf9b601f7 (patch) | |
| tree | c37fa16e6a0e8be5c830ccffea694f80199d9097 /arch/arm/mach-tegra/tegra2_clocks.c | |
| parent | 3950383b84567d337e68faeb49e55b48b20033b1 (diff) | |
tegra: clocks: Remove shared clocks from sku_limits
"avp.sclk" and "bsea.sclk" are shared clocks and should
be removed from sku_limits table as shared clocks are
registered later and not available at the time of putting
rate limits.
Original-Change-Id: Idc85d37a06e764e03f08e31582dbd16c77ae4b16
Reviewed-on: http://git-master/r/38271
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6c4d95bbf32d713a3e78201f49bc612423e8b35c
Diffstat (limited to 'arch/arm/mach-tegra/tegra2_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index b28b10c22d27..90feed409b0a 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -2508,8 +2508,6 @@ static struct tegra_sku_rate_limit sku_limits[] = RATE_LIMIT("sclk", 240000000, 0x04, 0x7, 0x08, 0x0F, 0x10), RATE_LIMIT("hclk", 240000000, 0x04, 0x7, 0x08, 0x0F, 0x10), - RATE_LIMIT("avp.sclk", 240000000, 0x04, 0x7, 0x08, 0x0F, 0x10), - RATE_LIMIT("bsea.sclk", 240000000, 0x04, 0x7, 0x08, 0x0F, 0x10), RATE_LIMIT("vde", 240000000, 0x04, 0x7, 0x08, 0x0F, 0x10), RATE_LIMIT("3d", 300000000, 0x04, 0x7, 0x08, 0x0F, 0x10), @@ -2519,8 +2517,6 @@ static struct tegra_sku_rate_limit sku_limits[] = RATE_LIMIT("virt_sclk", 300000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), RATE_LIMIT("hclk", 300000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), RATE_LIMIT("pclk", 150000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), - RATE_LIMIT("avp.sclk", 300000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), - RATE_LIMIT("bsea.sclk", 300000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), RATE_LIMIT("vde", 300000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), RATE_LIMIT("3d", 400000000, 0x14, 0x17, 0x18, 0x1B, 0x1C), }; |