diff options
| author | Luke Huang <lhuang@nvidia.com> | 2011-07-12 13:05:47 -0700 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-07-14 12:36:32 -0700 |
| commit | 4fed98b3fc71c5756845ad32b07b2129d049bf02 (patch) | |
| tree | 8f2fe82905b439ade3004ee47c6bc59514c8cdb8 /arch/arm/mach-tegra/tegra3_clocks.c | |
| parent | 36a6a0192319f0067ee8685fe56cfba5aba06ad8 (diff) | |
arm: tegra: clock: keep pllc on after lp0
pll_c is required to be on after lp0, otherwise there is a chance that
grhost will get stuck and the sync point won't be incremented.
bug 846944
Change-Id: Id73eeafe1587f64d3ec2bee9369732fd3e834003
Reviewed-on: http://git-master/r/40680
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_clocks.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_clocks.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c index 437579bbcafc..c20b66fb354a 100644 --- a/arch/arm/mach-tegra/tegra3_clocks.c +++ b/arch/arm/mach-tegra/tegra3_clocks.c @@ -4414,7 +4414,9 @@ void tegra_clk_resume(void) clk_writel(*ctx++, CLK_MASK_ARM); /* Restore back the actual pllc/a value */ - clk_writel(pllc_base, tegra_pll_c.reg + PLL_BASE); + /* FIXME: need to root cause why pllc is required to be on + * clk_writel(pllc_base, tegra_pll_c.reg + PLL_BASE); + */ clk_writel(plla_base, tegra_pll_a.reg + PLL_BASE); clk_writel(plld_base, tegra_pll_d.reg + PLL_BASE); clk_writel(plld2_base, tegra_pll_d2.reg + PLL_BASE); |