diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-06-06 15:45:45 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:47 -0800 |
| commit | e05e0f450b9824be182811a0f0628c21cae64460 (patch) | |
| tree | af99199cb61894b946d5846d13ef1d5df4efd542 /arch/arm/mach-tegra/tegra3_emc.c | |
| parent | e345544b8f6691a8648714e4e25ebacd5fe56dcf (diff) | |
ARM: tegra: dvfs: Update Tegra3 EMC DFS
Updated Tegra3 EMC clock change procedure with periodic qrst support,
and EMC DFS tables.
Bug 836260
Change-Id: Ia3d7f58bf61ee6e695ab62f934388d4c1b4d2079
Reviewed-on: http://git-master/r/35321
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Rebase-Id: Rc4b52e82783d355ec3a600d636b0871119a200d5
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_emc.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_emc.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/tegra3_emc.c b/arch/arm/mach-tegra/tegra3_emc.c index d4ee7d9f3af2..cdf1fc2b0279 100644 --- a/arch/arm/mach-tegra/tegra3_emc.c +++ b/arch/arm/mach-tegra/tegra3_emc.c @@ -521,8 +521,13 @@ static noinline void emc_set_clock(const struct tegra_emc_table *next_timing, emc_writel(DRAM_BROADCAST(dram_dev_num), EMC_SELF_REF); /* 10. restore periodic QRST */ - if (qrst_used) + if ((qrst_used) || (next_timing->emc_periodic_qrst != + last_timing->emc_periodic_qrst)) { + emc_cfg_reg = next_timing->emc_periodic_qrst ? + emc_cfg_reg | EMC_CFG_PERIODIC_QRST : + emc_cfg_reg & (~EMC_CFG_PERIODIC_QRST); periodic_qrst_restore(emc_cfg_reg, emc_dbg_reg); + } /* 11. set dram mode registers */ set_dram_mode(next_timing, last_timing, dll_change); @@ -576,6 +581,8 @@ static inline void emc_get_timing(struct tegra_emc_table *timing) timing->emc_mode_reset = 0; timing->emc_mode_1 = 0; timing->emc_mode_2 = 0; + timing->emc_periodic_qrst = (emc_readl(EMC_CFG) & + EMC_CFG_PERIODIC_QRST) ? 1 : 0; } /* The EMC registers have shadow registers. When the EMC clock is updated |