diff options
| author | Diwakar Tundlam <dtundlam@nvidia.com> | 2011-05-18 16:58:03 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:41 -0800 |
| commit | 7a3a6cecdf050e0d988b5ab8e32d94e8d4ea4bda (patch) | |
| tree | 5bfd5aa5969b7dc192711e76591d6588e4f9b66d /arch/arm/mach-tegra/tegra3_speedo.c | |
| parent | 198ce6b3b5ce5e48667bfb624b966f1e3842aa4e (diff) | |
ARM: tegra: clock: Set speedo_id according to actual fused SKU
- Read SKU_INFO fuse to get A02 SKU info
- Update CPU DVFS to use actual SKU info obtained
- Enable main table for EDP capping and thermal throttling
Original-Change-Id: I7ff3b06476998d77cc3f7a4fc03fb72e26b570db
Reviewed-on: http://git-master/r/32084
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: Re91f616032d8045ea2c28822e40f815f3e449931
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_speedo.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_speedo.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c index 9786c6bee06c..a46cae1ae831 100644 --- a/arch/arm/mach-tegra/tegra3_speedo.c +++ b/arch/arm/mach-tegra/tegra3_speedo.c @@ -73,14 +73,17 @@ static int rev_sku_to_soc_speedo(int rev, int sku) break; case TEGRA_REVISION_A02: switch (sku) { - case 0: // AP30 + case 0x87: // AP30 soc_speedo = 1; break; - case 1: // T30 + case 0x81: // T30 + case 0: // ENG soc_speedo = 2; break; default: - BUG(); + // FIXME: replace with BUG() when all SKU's valid + pr_err("Tegra3 Rev-A02: Unknown SKU %d\n", sku); + soc_speedo = 0; break; } break; @@ -143,10 +146,7 @@ void tegra_init_speedo_data(void) core_process_id = INVALID_PROCESS_ID; } - pr_info("Tegra3 SKU: %d Rev: %s CPU Process: %d CORE Process: %d " - "Speedo ID: %d", - tegra_sku_id(), tegra_get_revision_name(), - cpu_process_id, core_process_id, soc_speedo_id); + pr_debug("%s Soc speedo value %d", __func__, soc_speedo_id); } int tegra_cpu_process_id(void) |