diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-07-23 20:14:25 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:47:54 -0800 |
| commit | 4ed9769c0c832afa7292ef0c92d46f797a595dad (patch) | |
| tree | 079d63c3a929f7d8a203515ce1a3734b0d245e74 /arch/arm/mach-tegra/tegra3_speedo.c | |
| parent | 27a24ea57f4f662d3900f55e86f3d032368b078c (diff) | |
ARM: tegra: power: Add package mask to IO pad control
Modified dynamic IO pad configuration control to support SoC package
dependencies: set into "no-io-power state" IO pads that are not bonded
out on the particular package. Updated IO power detect table to account
for differences in Tegra2 and Tegra3 architecture.
Bug 853132
Original-Change-Id: I5f0aedfa784173cc37251ccf4e1dfb4d919db96e
Reviewed-on: http://git-master/r/42785
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Rebase-Id: R46208845c32e25340de6b1cebfb6b617c6c7ce4d
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_speedo.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_speedo.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c index ec84c3c8e36a..78c804f1f662 100644 --- a/arch/arm/mach-tegra/tegra3_speedo.c +++ b/arch/arm/mach-tegra/tegra3_speedo.c @@ -52,12 +52,7 @@ static int cpu_process_id; static int core_process_id; static int cpu_speedo_id; static int soc_speedo_id; - -static inline u8 fuse_package_info(void) -{ - /* Package info: 4 bits - 0,3:reserved 1:MID 2:DSC */ - return tegra_fuse_readl(FUSE_PACKAGE_INFO) & 0x0F; -} +static int package_id; static void fuse_speedo_calib(u32 *speedo_g, u32 *speedo_lp) { @@ -75,8 +70,6 @@ static void fuse_speedo_calib(u32 *speedo_g, u32 *speedo_lp) static void rev_sku_to_speedo_ids(int rev, int sku) { - u8 pkg; - switch (rev) { case TEGRA_REVISION_A01: cpu_speedo_id = 0; @@ -98,8 +91,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku) break; case 0: /* ENG - check PKG_SKU */ pr_info("Tegra3 ENG SKU: Checking pkg info\n"); - pkg = fuse_package_info(); - switch (pkg) { + switch (package_id) { case 1: /* MID => assume T30 */ cpu_speedo_id = 2; soc_speedo_id = 2; @@ -110,7 +102,7 @@ static void rev_sku_to_speedo_ids(int rev, int sku) break; default: pr_err("Tegra3 Rev-A02: Reserved pkg info %d\n", - pkg); + package_id); BUG(); break; } @@ -134,6 +126,9 @@ void tegra_init_speedo_data(void) u32 cpu_speedo_val, core_speedo_val; int iv; + /* Package info: 4 bits - 0,3:reserved 1:MID 2:DSC */ + package_id = tegra_fuse_readl(FUSE_PACKAGE_INFO) & 0x0F; + rev_sku_to_speedo_ids(tegra_get_revision(), tegra_sku_id()); BUG_ON(cpu_speedo_id >= ARRAY_SIZE(cpu_process_speedos)); BUG_ON(soc_speedo_id >= ARRAY_SIZE(core_process_speedos)); @@ -211,3 +206,8 @@ int tegra_soc_speedo_id(void) { return soc_speedo_id; } + +int tegra_package_id(void) +{ + return package_id; +} |