diff options
| author | Alex Frid <afrid@nvidia.com> | 2011-05-16 19:36:03 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:42:41 -0800 |
| commit | bbd494faa3f6efd86dcc015bec54d1ae07a464f2 (patch) | |
| tree | ece836b995a4e7b14e969790a781f7dd7795a7a4 /arch/arm/mach-tegra/tegra3_speedo.c | |
| parent | e54742a270072867ac18ea235b7edfb11c578abf (diff) | |
ARM: tegra: clock: Set Tegra3 CPU maximum rate to 1.4GHz
- Added CPU DVFS tables for Tegra3 chips with 1.4GHz support
- Updated speedo thresholds for process corners
- Set Tegra3 CPU maximum rate to 1.4MHz.
Effective only on boards with EDP table. Otherwise, the default EDP
limit keeps rate below 1GHz.
Original-Change-Id: Iaca3bb6a5fbfa1bf76131f49d08162fdbe35143f
Reviewed-on: http://git-master/r/31887
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R6f077fe6e698d3b4fa7ed475e1926de648208e18
Diffstat (limited to 'arch/arm/mach-tegra/tegra3_speedo.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra3_speedo.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra3_speedo.c b/arch/arm/mach-tegra/tegra3_speedo.c index 6377b9347dd9..9786c6bee06c 100644 --- a/arch/arm/mach-tegra/tegra3_speedo.c +++ b/arch/arm/mach-tegra/tegra3_speedo.c @@ -40,9 +40,9 @@ static const u32 core_process_speedos[][PROCESS_CORNERS_NUM] = { /* Maximum speedo levels for each CPU process corner */ static const u32 cpu_process_speedos[][PROCESS_CORNERS_NUM] = { // proc_id 0 1 2 3 - {305, 337, 360, 376}, // soc_speedo_id 0 - {337, 337, 360, 376}, // soc_speedo_id 1 - {305, 337, 360, 376}, // soc_speedo_id 2 + {306, 338, 360, 376}, // soc_speedo_id 0 + {306, 338, 360, 376}, // soc_speedo_id 1 + {338, 338, 360, 376}, // soc_speedo_id 2 }; static int cpu_process_id; |