diff options
| author | Alex Frid <afrid@nvidia.com> | 2014-02-15 19:10:17 -0800 |
|---|---|---|
| committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-02-18 12:00:20 -0800 |
| commit | 5b832bdd874168666c1a3dd2007a5f0e011f1515 (patch) | |
| tree | b858ec18af0fe7f63d1d872da8a8124c2c07914e /arch/arm/mach-tegra/tegra_cl_dvfs.c | |
| parent | da36c6d19892397d66d140b2b57ab465a1ab417c (diff) | |
ARM: tegra: dvfs: Add access to DFLL thermal floors
Since SiMon grading offsets applied to CPU Vmin only if DFLL is used
as a clock source, thermal floors in DFLL and PLL modes can now be
different. Although CL-DVFS driver maintains its own copy of thermal
floors properly updated with SiMon offsets, this updated floors are
not accessible by legacy DVFS mechanisms that are still engaged in DFLL
mode: rail stats gathering, DVFS debugfs tree, and safe voltage setting
before cluster switch (using PLL mode floors is still safe in this
case, but unnecessary push voltage higher). Hence, this commit exposed
DFLL thermal floors to legacy DVFS.
Bug 1343366
Change-Id: Ibd0bcd577f72f6022a4a83faf1894bec2361c151
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/368124
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra_cl_dvfs.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra_cl_dvfs.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/tegra_cl_dvfs.c b/arch/arm/mach-tegra/tegra_cl_dvfs.c index 6bdb8a7e7d4e..f884509a06db 100644 --- a/arch/arm/mach-tegra/tegra_cl_dvfs.c +++ b/arch/arm/mach-tegra/tegra_cl_dvfs.c @@ -215,6 +215,7 @@ struct tegra_cl_dvfs { u8 minimax_output; u8 thermal_out_caps[MAX_THERMAL_LIMITS]; u8 thermal_out_floors[MAX_THERMAL_LIMITS]; + int thermal_mv_floors[MAX_THERMAL_LIMITS]; int therm_caps_num; int therm_floors_num; unsigned long dvco_rate_floors[MAX_THERMAL_LIMITS+1]; @@ -1169,6 +1170,7 @@ static void cl_dvfs_convert_cold_output_floor(struct tegra_cl_dvfs *cld, int offset) { int i; + struct dvfs_rail *rail = cld->safe_dvfs->dvfs_rail; /* * Convert monotonically decreasing thermal floors at low temperature @@ -1176,13 +1178,17 @@ static void cl_dvfs_convert_cold_output_floor(struct tegra_cl_dvfs *cld, * above maximum thermal floor. The latter is also exempt from offset * application. */ - cld->therm_floors_num = cld->safe_dvfs->dvfs_rail->therm_mv_floors_num; + cld->therm_floors_num = rail->therm_mv_floors_num; for (i = 0; i < cld->therm_floors_num; i++) { - int mv = cld->safe_dvfs->dvfs_rail->therm_mv_floors[i] + - (i ? offset : 0); - cld->thermal_out_floors[i] = find_mv_out_cap(cld, mv); + int mv = rail->therm_mv_floors[i] + (i ? offset : 0); + u8 out = cld->thermal_out_floors[i] = find_mv_out_cap(cld, mv); + cld->thermal_mv_floors[i] = get_mv(cld, out); } BUG_ON(cld->thermal_out_floors[0] + 1 >= get_output_top(cld)); + if (!rail->therm_mv_dfll_floors) { + wmb(); + rail->therm_mv_dfll_floors = cld->thermal_mv_floors; + } } static void cl_dvfs_init_cold_output_floor(struct tegra_cl_dvfs *cld) |