diff options
| author | Kamal Kannan Balagopalan <kbalagopalan@nvidia.com> | 2012-06-12 14:38:43 -0700 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2013-09-14 12:13:30 -0700 |
| commit | 62ab901b5b760703a8a2f8116400933ca1b6f341 (patch) | |
| tree | 124b914679735246a400256aa2620cd4e042b205 /arch/arm/mach-tegra/wdt-recovery.c | |
| parent | 8de8c34679e442ee3560b24054578ebd89c3bd87 (diff) | |
ARM: tegra: wdt: Add support for Tegra3 CPU WDTs
Tegra3 adds new CPU watchdog timers. Add device support for the
CPU WDTs.
Bug 857748
Change-Id: I0f99c37fed89879d39667b734654c659fe631aaf
Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com>
Reviewed-on: http://git-master/r/108379
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Ra9d8a62a5f859a251cc52b7a6ac20185d559191f
Diffstat (limited to 'arch/arm/mach-tegra/wdt-recovery.c')
| -rw-r--r-- | arch/arm/mach-tegra/wdt-recovery.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/wdt-recovery.c b/arch/arm/mach-tegra/wdt-recovery.c index cad381fc14be..3c43712bd486 100644 --- a/arch/arm/mach-tegra/wdt-recovery.c +++ b/arch/arm/mach-tegra/wdt-recovery.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/wdt-recovery.c * - * Copyright (c) 2011, NVIDIA Corporation. + * Copyright (c) 2012, NVIDIA Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -45,7 +45,7 @@ static int wdt_heartbeat = 30; #define TIMER_PCR 0x4 #define TIMER_PCR_INTR (1 << 30) #define WDT_CFG (0) - #define WDT_CFG_TMR_SRC (7 << 0) /* for TMR7. */ + #define WDT_CFG_TMR_SRC (0 << 0) /* for TMR10. */ #define WDT_CFG_PERIOD (1 << 4) #define WDT_CFG_INT_EN (1 << 12) #define WDT_CFG_SYS_RST_EN (1 << 14) @@ -56,8 +56,8 @@ static int wdt_heartbeat = 30; #define WDT_UNLOCK (0xC) #define WDT_UNLOCK_PATTERN (0xC45A << 0) -static void __iomem *wdt_timer = IO_ADDRESS(TEGRA_TMR7_BASE); -static void __iomem *wdt_source = IO_ADDRESS(TEGRA_WDT0_BASE); +static void __iomem *wdt_timer = IO_ADDRESS(TEGRA_TMR10_BASE); +static void __iomem *wdt_source = IO_ADDRESS(TEGRA_WDT3_BASE); static void tegra_wdt_reset_enable(void) { |