diff options
author | Gary King <gking@nvidia.com> | 2010-10-12 18:10:31 -0700 |
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committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:36:29 -0800 |
commit | 62481c76515dabe7e7f5e2d7f79d1a42a66a52d4 (patch) | |
tree | d2e9524127312420067ecb986c1b6f58b92324ab /arch/arm/mm/Kconfig | |
parent | 90c1781ef8411908879b4cffd941acb1c6a1c554 (diff) |
Revert "[ARM] mm: add page allocator for modifying cache attributes"
This reverts commit 54d414570432ce07fa1a14b657f53bed752e3d7e.
Change-Id: I8e5cf6ef3555129da9741ef52a1e6a3a772ad588
Signed-off-by: Gary King <gking@nvidia.com>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r-- | arch/arm/mm/Kconfig | 23 |
1 files changed, 0 insertions, 23 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 122d88e073d6..88633fe01a5d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -864,29 +864,6 @@ config ARM_L1_CACHE_SHIFT default 6 if ARM_L1_CACHE_SHIFT_6 default 5 -config ARM_ATTRIB_ALLOCATOR - bool "Support custom cache attribute allocations in low memory" - select ARCH_LOWMEM_IN_PTES if (CPU_V7) - depends on MMU && !CPU_CACHE_VIVT - help - Historically, the kernel has only reserved a small region - of physical memory for uncached access, and relied on - explicit cache maintenance for ensuring coherency between - the CPU and DMA. - - However, many recent systems support mapping discontiguous - physical pages into contiguous DMA addresses (so-called - system MMUs). For some DMA clients (notably graphics and - multimedia engines), performing explict cache maintenance - between CPU and DMA mappings can be prohibitively expensive, - and since ARMv7, mapping the same physical page with different - cache attributes is disallowed and has unpredictable behavior. - - Say 'Y' here to include page allocation support with explicit - cache attributes; on ARMv7 systems this will also force the - kernel's page tables to be mapped using page tables rather - than sections. - config ARM_DMA_MEM_BUFFERABLE bool "Use non-cacheable memory for DMA" if (CPU_V6 || CPU_V6K) && !CPU_V7 depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \ |