diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-08-26 20:28:52 +0100 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-04-05 17:52:18 -0700 |
| commit | 55f0f45a45263ba26bd473f50f867d29dd836e46 (patch) | |
| tree | 73f523b60496aae8b03942ff8191de0e2e01aaee /arch/arm/mm/proc-v6.S | |
| parent | 037bc840859c0d52abedeb576888714698f04bcf (diff) | |
ARM: pm: preallocate a page table for suspend/resume
Preallocate a page table and setup an identity mapping for the MMU
enable code. This means we don't have to "borrow" a page table to
do this, avoiding complexities with L2 cache coherency.
Change-Id: I625d3622359e961e4f358171e9a82b51bcecf9c2
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/85671
Reviewed-by: Automatic_Commit_Validation_User
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
| -rw-r--r-- | arch/arm/mm/proc-v6.S | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index a923aa0fd00d..414e3696bdf7 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -161,14 +161,8 @@ ENTRY(cpu_v6_do_resume) mcr p15, 0, ip, c2, c0, 2 @ TTB control register mcr p15, 0, ip, c7, c5, 4 @ ISB mov r0, r11 @ control register - mov r2, r7, lsr #14 @ get TTB0 base - mov r2, r2, lsl #14 - ldr r3, cpu_resume_l1_flags b cpu_resume_mmu ENDPROC(cpu_v6_do_resume) -cpu_resume_l1_flags: - ALT_SMP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_SMP) - ALT_UP(.long PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_FLAGS_UP) #endif string cpu_v6_name, "ARMv6-compatible processor" |