diff options
| author | Scott Williams <scwilliams@nvidia.com> | 2012-03-05 15:35:52 -0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-07 22:23:49 -0800 |
| commit | 027dab22573050fb1b33d14bfd48ee79eaafeeb1 (patch) | |
| tree | 710daecb5312b894149d06700fd48c28b8cd1581 /arch/arm/mm | |
| parent | 7fda6d8c88cb138e720d600d75f468a192e1f625 (diff) | |
ARM: mm: Implement complete debug arch v7 save/restore
Implement the complete debug arch v7 save/restore sequence
as required by the ARM Architectural Reference Manual.
Change-Id: Ia346a87b16e759ae5dbbbd02e77eda1e6d6deb82
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/87865
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/proc-v7.S | 43 |
1 files changed, 34 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 983d6069812d..38c78253f769 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -222,11 +222,11 @@ ENDPROC(cpu_v7_set_pte_ext) #ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT /* * Debug context: - * 4 CP14 registers + * 8 CP14 registers * 16x2 CP14 breakpoint registers (maximum) * 16x2 CP14 watchpoint registers (maximum) */ -.equ cpu_v7_debug_suspend_size, (4 * (4 + (16 * 2) + (16 * 2))) +.equ cpu_v7_debug_suspend_size, (4 * (8 + (16 * 2) + (16 * 2))) .macro save_brkpt cm mrc p14, 0, r4, c0, \cm, 4 @@ -276,12 +276,25 @@ ENTRY(cpu_v7_do_suspend) #ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT /* Save CP14 debug controller context */ - mrc p14, 0, r4, c0, c1, 0 @ DSCR - mrc p14, 0, r5, c0, c6, 0 @ WFAR - mrc p14, 0, r6, c0, c7, 0 @ VCR - mrc p14, 0, r7, c7, c9, 6 @ CLAIM + + mrc p14, 0, r4, c0, c2, 2 @ DBGDSCRext + mrc p14, 0, r5, c0, c6, 0 @ DBGWFAR + mrc p14, 0, r6, c0, c7, 0 @ DBGVCR + mrc p14, 0, r7, c7, c9, 6 @ DBGCLAIMCLR stmia r0!, {r4-r7} + mrc p14, 0, r4, c0, c10, 0 @ DBGDSCCR + mrc p14, 0, r5, c0, c11, 0 @ DBGDSMCR + stmia r0!, {r4-r5} + + tst r4, #(1 << 29) @ DBGDSCRext.TXfull + mrcne p14, 0, r4, c0, c3, 2 @ DBGDTRTXext + strne r4, [r0], #4 + + tst r4, #(1 << 30) @ DBGDSCRext.RXfull + mrcne p14, 0, r4, c0, c0, 2 @ DBGDTRRXext + strne r4, [r0], #4 + mrc p14, 0, r8, c0, c0, 0 @ read IDR mov r3, r8, lsr #24 and r3, r3, #0xf @ r3 has the number of brkpt @@ -371,9 +384,21 @@ ENTRY(cpu_v7_do_resume) /* Restore CP14 debug controller context */ ldmia r0!, {r2 - r5} - mcr p14, 0, r3, c0, c6, 0 @ WFAR - mcr p14, 0, r4, c0, c7, 0 @ VCR - mcr p14, 0, r5, c7, c8, 6 @ CLAIM + mcr p14, 0, r3, c0, c6, 0 @ DBGWFAR + mcr p14, 0, r4, c0, c7, 0 @ DBGVCR + mcr p14, 0, r5, c7, c8, 6 @ DBGCLAIMSET + + ldmia r0!, {r4-r5} + mcr p14, 0, r4, c0, c10, 0 @ DBGDSCCR + mcr p14, 0, r5, c0, c11, 0 @ DBGDSMCR + + tst r2, #(1 << 29) @ DBGDSCRext.TXfull + ldrne r4, [r0], #4 + mcrne p14, 0, r4, c0, c3, 2 @ DBGDTRTXext + + tst r2, #(1 << 30) @ DBGDSCRext.RXfull + ldrne r4, [r0], #4 + mcrne p14, 0, r4, c0, c0, 2 @ DBGDTRRXext mrc p14, 0, r8, c0, c0, 0 @ read IDR mov r3, r8, lsr #24 |