diff options
| author | Colin Cross <ccross@android.com> | 2011-01-22 00:37:09 -0800 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:34:14 -0800 |
| commit | 98ff33dac47885f0b26cfd80fe090a144c6e499d (patch) | |
| tree | 61e959ee8c633e9932f4aecb524de2a79749600d /arch/arm/mm | |
| parent | 50983012b693831e04c73741de5d31496945c144 (diff) | |
ARM: mm: cache-l2x0: Add support for re-enabling l2x0
Remove __init annotation from l2x0_init so it can be used to
reinitialize the l2x0 after it has been reset during suspend.
Only print the init messages the first time l2x0_init is called.
Add l2x0_enable to re-enable the l2x0 after l2x0_disable if
the l2x0 was not reset.
l2x0_disable cannot use writel, as writel calls wmb(), and wmb()
may call outer_cache_sync, which takes the same spinlock as
l2x0_disable.
Change-Id: Iaddedb4f582c7eeaef3cbe2a1e463787f0f809a4
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mm')
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 9ecfdb511951..110e14811171 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -266,6 +266,16 @@ static void l2x0_flush_range(unsigned long start, unsigned long end) spin_unlock_irqrestore(&l2x0_lock, flags); } +/* enables l2x0 after l2x0_disable, does not invalidate */ +void l2x0_enable(void) +{ + unsigned long flags; + + spin_lock_irqsave(&l2x0_lock, flags); + writel_relaxed(1, l2x0_base + L2X0_CTRL); + spin_unlock_irqrestore(&l2x0_lock, flags); +} + static void l2x0_disable(void) { unsigned long flags; @@ -296,7 +306,7 @@ static void __init l2x0_unlock(__u32 cache_id) } } -void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) +void l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) { __u32 aux; __u32 cache_id; @@ -368,7 +378,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) outer_cache.disable = l2x0_disable; outer_cache.set_debug = l2x0_set_debug; - printk(KERN_INFO "%s cache controller enabled\n", type); - printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", + pr_info_once("%s cache controller enabled\n", type); + pr_info_once("l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", ways, cache_id, aux, l2x0_size); } |