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| author | Robby Cai <R63905@freescale.com> | 2012-09-03 13:54:33 +0800 |
|---|---|---|
| committer | Robby Cai <R63905@freescale.com> | 2012-09-03 14:10:02 +0800 |
| commit | f96b367fdd4b1db2c01e6aa59a825c5e6873efa4 (patch) | |
| tree | 4057388d64f6612d4ba51e7dae6efb8e43e63f27 /arch/arm/plat-mxc/cpufreq.c | |
| parent | f3ff4c24af4d5bff0bb275e79c779c22d1263797 (diff) | |
ENGR00222841: mx6sl: pgc: display power gating causes PxP processing timeout
For safety, DO NOT enable display power gating feature for MX6SL EVK.
Otherwise will meet PxP processing timeout when run EPDC unit test.
The cause is under investigation.
Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'arch/arm/plat-mxc/cpufreq.c')
0 files changed, 0 insertions, 0 deletions