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authorLinus Torvalds <torvalds@linux-foundation.org>2013-09-06 13:21:16 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-06 13:21:16 -0700
commit8e73e367f7dc50f1d1bc22a63e5764bb4eea9b48 (patch)
tree9bf593c1fc7612bcdd64b9ba46e41d340f9e94d3 /arch/arm/plat-samsung
parentd2f3e9eb7c9e12e89f0ac5f0dbc7a9aed0ea925d (diff)
parent7323f219533e01cc075ba45a76f3e5b214adb23f (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson: "This branch contains code cleanups, moves and removals for 3.12. There's a large number of various cleanups, and a nice net removal of 13500 lines of code. Highlights worth mentioning are: - A series of patches from Stephen Boyd removing the ARM local timer API. - Move of Qualcomm MSM IOMMU code to drivers/iommu. - Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM driver and switching over to the drivers/pwm one. - Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM). There's also a move of a header file out of include/linux/i2c/ to platform_data, where it really belongs. It touches mostly ARM platform code for include changes so we took it through our tree" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits) ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK gpio: (gpio-pca953x) move header to linux/platform_data/ arm: zynq: hotplug: Remove unreachable code ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*() tegra: simplify use of devm_ioremap_resource ARM: SAMSUNG: Remove plat/regs-timer.h header ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header ARM: SAMSUNG: Remove pwm-clock infrastructure ARM: SAMSUNG: Remove old PWM timer platform devices pwm: Remove superseded pwm-samsung-legacy driver ARM: SAMSUNG: Modify board files to use new PWM platform device ARM: SAMSUNG: Rework private data handling in dev-backlight pwm: Add new pwm-samsung driver ARM: mach-mvebu: remove redundant DT parsing and validation ARM: msm: Only compile io.c on platforms that use it iommu/msm: Move mach includes to iommu directory ARM: msm: Remove devices-iommu.c ARM: msm: Move mach/board.h contents to common.h ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE ARM: msm: Remove TMR and TMR0 static mappings ...
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/Kconfig14
-rw-r--r--arch/arm/plat-samsung/Makefile3
-rw-r--r--arch/arm/plat-samsung/dev-backlight.c61
-rw-r--r--arch/arm/plat-samsung/devs.c42
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h4
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/irq-vic-timer.h13
-rw-r--r--arch/arm/plat-samsung/include/plat/irqs.h9
-rw-r--r--arch/arm/plat-samsung/include/plat/pwm-clock.h81
-rw-r--r--arch/arm/plat-samsung/include/plat/pwm-core.h22
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-timer.h124
-rw-r--r--arch/arm/plat-samsung/include/plat/samsung-time.h23
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h38
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c98
-rw-r--r--arch/arm/plat-samsung/pwm-clock.c474
-rw-r--r--arch/arm/plat-samsung/s5p-irq.c4
-rw-r--r--arch/arm/plat-samsung/samsung-time.c394
17 files changed, 66 insertions, 1339 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index a5b5ff6e68d2..7dfba937d8fc 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -25,7 +25,6 @@ config PLAT_S5P
select S5P_GPIO_DRVSTR
select SAMSUNG_CLKSRC if !COMMON_CLK
select SAMSUNG_GPIOLIB_4BIT
- select SAMSUNG_IRQ_VIC_TIMER
help
Base platform code for Samsung's S5P series SoC.
@@ -79,14 +78,6 @@ config SAMSUNG_ATAGS
if SAMSUNG_ATAGS
-# timer options
-
-config SAMSUNG_HRT
- bool
- select SAMSUNG_DEV_PWM
- help
- Use the High Resolution timer support
-
# clock options
config SAMSUNG_CLOCK
@@ -106,11 +97,6 @@ config S5P_CLOCK
# options for IRQ support
-config SAMSUNG_IRQ_VIC_TIMER
- bool
- help
- Internal configuration to build the VIC timer interrupt code.
-
config S5P_IRQ
def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 199bbe304d02..498c7c23e9f4 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,15 +12,12 @@ obj- :=
# Objects we always build independent of SoC choice
obj-y += init.o cpu.o
-obj-$(CONFIG_SAMSUNG_HRT) += samsung-time.o
obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o
-obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o
-obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index 5f197dcaf10c..d51f9565567c 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -20,13 +20,18 @@
#include <plat/gpio-cfg.h>
#include <plat/backlight.h>
+struct samsung_bl_drvdata {
+ struct platform_pwm_backlight_data plat_data;
+ struct samsung_bl_gpio_info *gpio_info;
+};
+
static int samsung_bl_init(struct device *dev)
{
int ret = 0;
- struct platform_device *timer_dev =
- container_of(dev->parent, struct platform_device, dev);
- struct samsung_bl_gpio_info *bl_gpio_info =
- timer_dev->dev.platform_data;
+ struct platform_pwm_backlight_data *pdata = dev->platform_data;
+ struct samsung_bl_drvdata *drvdata = container_of(pdata,
+ struct samsung_bl_drvdata, plat_data);
+ struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
ret = gpio_request(bl_gpio_info->no, "Backlight");
if (ret) {
@@ -42,10 +47,10 @@ static int samsung_bl_init(struct device *dev)
static void samsung_bl_exit(struct device *dev)
{
- struct platform_device *timer_dev =
- container_of(dev->parent, struct platform_device, dev);
- struct samsung_bl_gpio_info *bl_gpio_info =
- timer_dev->dev.platform_data;
+ struct platform_pwm_backlight_data *pdata = dev->platform_data;
+ struct samsung_bl_drvdata *drvdata = container_of(pdata,
+ struct samsung_bl_drvdata, plat_data);
+ struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT);
gpio_free(bl_gpio_info->no);
@@ -60,12 +65,14 @@ static void samsung_bl_exit(struct device *dev)
* for their specific boards
*/
-static struct platform_pwm_backlight_data samsung_dfl_bl_data __initdata = {
- .max_brightness = 255,
- .dft_brightness = 255,
- .pwm_period_ns = 78770,
- .init = samsung_bl_init,
- .exit = samsung_bl_exit,
+static struct samsung_bl_drvdata samsung_dfl_bl_data __initdata = {
+ .plat_data = {
+ .max_brightness = 255,
+ .dft_brightness = 255,
+ .pwm_period_ns = 78770,
+ .init = samsung_bl_init,
+ .exit = samsung_bl_exit,
+ },
};
static struct platform_device samsung_dfl_bl_device __initdata = {
@@ -82,6 +89,7 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
{
int ret = 0;
struct platform_device *samsung_bl_device;
+ struct samsung_bl_drvdata *samsung_bl_drvdata;
struct platform_pwm_backlight_data *samsung_bl_data;
samsung_bl_device = kmemdup(&samsung_dfl_bl_device,
@@ -91,17 +99,19 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
return;
}
- samsung_bl_data = s3c_set_platdata(&samsung_dfl_bl_data,
- sizeof(struct platform_pwm_backlight_data), samsung_bl_device);
- if (!samsung_bl_data) {
+ samsung_bl_drvdata = kmemdup(&samsung_dfl_bl_data,
+ sizeof(samsung_dfl_bl_data), GFP_KERNEL);
+ if (!samsung_bl_drvdata) {
printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
goto err_data;
}
+ samsung_bl_device->dev.platform_data = &samsung_bl_drvdata->plat_data;
+ samsung_bl_drvdata->gpio_info = gpio_info;
+ samsung_bl_data = &samsung_bl_drvdata->plat_data;
/* Copy board specific data provided by user */
samsung_bl_data->pwm_id = bl_data->pwm_id;
- samsung_bl_device->dev.parent =
- &s3c_device_timer[samsung_bl_data->pwm_id].dev;
+ samsung_bl_device->dev.parent = &samsung_device_pwm.dev;
if (bl_data->max_brightness)
samsung_bl_data->max_brightness = bl_data->max_brightness;
@@ -122,17 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
if (bl_data->check_fb)
samsung_bl_data->check_fb = bl_data->check_fb;
- /* Keep the GPIO info for future use */
- s3c_device_timer[samsung_bl_data->pwm_id].dev.platform_data = gpio_info;
-
- /* Register the specific PWM timer dev for Backlight control */
- ret = platform_device_register(
- &s3c_device_timer[samsung_bl_data->pwm_id]);
- if (ret) {
- printk(KERN_ERR "failed to register pwm timer for backlight: %d\n", ret);
- goto err_plat_reg1;
- }
-
/* Register the Backlight dev */
ret = platform_device_register(samsung_bl_device);
if (ret) {
@@ -143,8 +142,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
return;
err_plat_reg2:
- platform_device_unregister(&s3c_device_timer[samsung_bl_data->pwm_id]);
-err_plat_reg1:
kfree(samsung_bl_data);
err_data:
kfree(samsung_bl_device);
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 0f9c3f431a5f..8ce0ac007eb9 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -58,6 +58,7 @@
#include <plat/keypad.h>
#include <linux/platform_data/mmc-s3cmci.h>
#include <linux/platform_data/mtd-nand-s3c2410.h>
+#include <plat/pwm-core.h>
#include <plat/sdhci.h>
#include <linux/platform_data/touchscreen-s3c2410.h>
#include <linux/platform_data/usb-s3c2410_udc.h>
@@ -1097,36 +1098,21 @@ arch_initcall(s5p_pmu_init);
/* PWM Timer */
#ifdef CONFIG_SAMSUNG_DEV_PWM
+static struct resource samsung_pwm_resource[] = {
+ DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
+};
-#define TIMER_RESOURCE_SIZE (1)
-
-#define TIMER_RESOURCE(_tmr, _irq) \
- (struct resource [TIMER_RESOURCE_SIZE]) { \
- [0] = { \
- .start = _irq, \
- .end = _irq, \
- .flags = IORESOURCE_IRQ \
- } \
- }
-
-#define DEFINE_S3C_TIMER(_tmr_no, _irq) \
- .name = "s3c24xx-pwm", \
- .id = _tmr_no, \
- .num_resources = TIMER_RESOURCE_SIZE, \
- .resource = TIMER_RESOURCE(_tmr_no, _irq), \
-
-/*
- * since we already have an static mapping for the timer,
- * we do not bother setting any IO resource for the base.
- */
-
-struct platform_device s3c_device_timer[] = {
- [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
- [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
- [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
- [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
- [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
+struct platform_device samsung_device_pwm = {
+ .name = "samsung-pwm",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(samsung_pwm_resource),
+ .resource = samsung_pwm_resource,
};
+
+void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
+{
+ samsung_device_pwm.dev.platform_data = pd;
+}
#endif /* CONFIG_SAMSUNG_DEV_PWM */
/* RTC */
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index df45d6edc98d..63239f409807 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -145,10 +145,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
-/* Init for pwm clock code */
-
-extern void s3c_pwmclk_init(void);
-
/* Global watchdog clock used by arch_wtd_reset() callback */
extern struct clk *s3c2410_wdtclk;
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 87d501ff3328..0dc4ac4909b0 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
extern struct platform_device samsung_asoc_idma;
extern struct platform_device samsung_device_keypad;
+extern struct platform_device samsung_device_pwm;
/* s3c2440 specific devices */
diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
deleted file mode 100644
index 5b9c42fd32d7..000000000000
--- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
- *
- * Copyright (c) 2010 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- *
- * Header file for Samsung SoC IRQ VIC timer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq);
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index df46b776976a..039001c0ef05 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,15 +44,6 @@
#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
-#define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x))
-
-#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
-#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
-#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
-#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
-#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
-#define IRQ_TIMER_COUNT (5)
-
#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
: ((x) - 16 + S5P_EINT_BASE2))
diff --git a/arch/arm/plat-samsung/include/plat/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h
deleted file mode 100644
index bf6a60eb6237..000000000000
--- a/arch/arm/plat-samsung/include/plat/pwm-clock.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h
- *
- * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * SAMSUNG - pwm clock and timer support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_PLAT_PWM_CLOCK_H
-#define __ASM_PLAT_PWM_CLOCK_H __FILE__
-
-/**
- * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
- * @tcfg: The timer TCFG1 register bits shifted down to 0.
- *
- * Return true if the given configuration from TCFG1 is a TCLK instead
- * any of the TDIV clocks.
- */
-static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
-{
- if (soc_is_s3c24xx())
- return tcfg == S3C2410_TCFG1_MUX_TCLK;
- else if (soc_is_s3c64xx() || soc_is_s5pc100())
- return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
- else if (soc_is_s5p6440() || soc_is_s5p6450())
- return 0;
- else
- return tcfg == S3C64XX_TCFG1_MUX_TCLK;
-}
-
-/**
- * tcfg_to_divisor() - convert tcfg1 setting to a divisor
- * @tcfg1: The tcfg1 setting, shifted down.
- *
- * Get the divisor value for the given tcfg1 setting. We assume the
- * caller has already checked to see if this is not a TCLK source.
- */
-static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
-{
- if (soc_is_s3c24xx())
- return 1 << (tcfg1 + 1);
- else
- return 1 << tcfg1;
-}
-
-/**
- * pwm_tdiv_has_div1() - does the tdiv setting have a /1
- *
- * Return true if we have a /1 in the tdiv setting.
- */
-static inline unsigned int pwm_tdiv_has_div1(void)
-{
- if (soc_is_s3c24xx())
- return 0;
- else
- return 1;
-}
-
-/**
- * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
- * @div: The divisor to calculate the bit information for.
- *
- * Turn a divisor into the necessary bit field for TCFG1.
- */
-static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
-{
- if (soc_is_s3c24xx())
- return ilog2(div) - 1;
- else
- return ilog2(div);
-}
-#endif /* __ASM_PLAT_PWM_CLOCK_H */
diff --git a/arch/arm/plat-samsung/include/plat/pwm-core.h b/arch/arm/plat-samsung/include/plat/pwm-core.h
new file mode 100644
index 000000000000..5bff1facb672
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/pwm-core.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Tomasz Figa <tomasz.figa@gmail.com>
+ *
+ * Samsung PWM controller platform data helpers.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_PWM_CORE_H
+#define __ASM_ARCH_PWM_CORE_H __FILE__
+
+#include <clocksource/samsung_pwm.h>
+
+#ifdef CONFIG_SAMSUNG_DEV_PWM
+extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);
+#else
+static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
+#endif
+
+#endif /* __ASM_ARCH_PWM_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h
deleted file mode 100644
index d097d92f8cc7..000000000000
--- a/arch/arm/plat-samsung/include/plat/regs-timer.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 Timer configuration
-*/
-
-#ifndef __ASM_ARCH_REGS_TIMER_H
-#define __ASM_ARCH_REGS_TIMER_H
-
-#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
-#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
-
-#define S3C2410_TCFG0 S3C_TIMERREG(0x00)
-#define S3C2410_TCFG1 S3C_TIMERREG(0x04)
-#define S3C2410_TCON S3C_TIMERREG(0x08)
-
-#define S3C64XX_TINT_CSTAT S3C_TIMERREG(0x44)
-
-#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
-#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
-#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
-#define S3C2410_TCFG_DEADZONE_MASK (255<<16)
-#define S3C2410_TCFG_DEADZONE_SHIFT (16)
-
-#define S3C2410_TCFG1_MUX4_DIV2 (0<<16)
-#define S3C2410_TCFG1_MUX4_DIV4 (1<<16)
-#define S3C2410_TCFG1_MUX4_DIV8 (2<<16)
-#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
-#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
-#define S3C2410_TCFG1_MUX4_MASK (15<<16)
-#define S3C2410_TCFG1_MUX4_SHIFT (16)
-
-#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
-#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
-#define S3C2410_TCFG1_MUX3_DIV8 (2<<12)
-#define S3C2410_TCFG1_MUX3_DIV16 (3<<12)
-#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12)
-#define S3C2410_TCFG1_MUX3_MASK (15<<12)
-
-
-#define S3C2410_TCFG1_MUX2_DIV2 (0<<8)
-#define S3C2410_TCFG1_MUX2_DIV4 (1<<8)
-#define S3C2410_TCFG1_MUX2_DIV8 (2<<8)
-#define S3C2410_TCFG1_MUX2_DIV16 (3<<8)
-#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8)
-#define S3C2410_TCFG1_MUX2_MASK (15<<8)
-
-
-#define S3C2410_TCFG1_MUX1_DIV2 (0<<4)
-#define S3C2410_TCFG1_MUX1_DIV4 (1<<4)
-#define S3C2410_TCFG1_MUX1_DIV8 (2<<4)
-#define S3C2410_TCFG1_MUX1_DIV16 (3<<4)
-#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4)
-#define S3C2410_TCFG1_MUX1_MASK (15<<4)
-
-#define S3C2410_TCFG1_MUX0_DIV2 (0<<0)
-#define S3C2410_TCFG1_MUX0_DIV4 (1<<0)
-#define S3C2410_TCFG1_MUX0_DIV8 (2<<0)
-#define S3C2410_TCFG1_MUX0_DIV16 (3<<0)
-#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0)
-#define S3C2410_TCFG1_MUX0_MASK (15<<0)
-
-#define S3C2410_TCFG1_MUX_DIV2 (0<<0)
-#define S3C2410_TCFG1_MUX_DIV4 (1<<0)
-#define S3C2410_TCFG1_MUX_DIV8 (2<<0)
-#define S3C2410_TCFG1_MUX_DIV16 (3<<0)
-#define S3C2410_TCFG1_MUX_TCLK (4<<0)
-#define S3C2410_TCFG1_MUX_MASK (15<<0)
-
-#define S3C64XX_TCFG1_MUX_DIV1 (0<<0)
-#define S3C64XX_TCFG1_MUX_DIV2 (1<<0)
-#define S3C64XX_TCFG1_MUX_DIV4 (2<<0)
-#define S3C64XX_TCFG1_MUX_DIV8 (3<<0)
-#define S3C64XX_TCFG1_MUX_DIV16 (4<<0)
-#define S3C64XX_TCFG1_MUX_TCLK (5<<0) /* 3 sets of TCLK */
-#define S3C64XX_TCFG1_MUX_MASK (15<<0)
-
-#define S3C2410_TCFG1_SHIFT(x) ((x) * 4)
-
-/* for each timer, we have an count buffer, an compare buffer and
- * an observation buffer
-*/
-
-/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */
-
-#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00)
-#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04)
-#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
-
-#define S3C2410_TCON_T4RELOAD (1<<22)
-#define S3C2410_TCON_T4MANUALUPD (1<<21)
-#define S3C2410_TCON_T4START (1<<20)
-
-#define S3C2410_TCON_T3RELOAD (1<<19)
-#define S3C2410_TCON_T3INVERT (1<<18)
-#define S3C2410_TCON_T3MANUALUPD (1<<17)
-#define S3C2410_TCON_T3START (1<<16)
-
-#define S3C2410_TCON_T2RELOAD (1<<15)
-#define S3C2410_TCON_T2INVERT (1<<14)
-#define S3C2410_TCON_T2MANUALUPD (1<<13)
-#define S3C2410_TCON_T2START (1<<12)
-
-#define S3C2410_TCON_T1RELOAD (1<<11)
-#define S3C2410_TCON_T1INVERT (1<<10)
-#define S3C2410_TCON_T1MANUALUPD (1<<9)
-#define S3C2410_TCON_T1START (1<<8)
-
-#define S3C2410_TCON_T0DEADZONE (1<<4)
-#define S3C2410_TCON_T0RELOAD (1<<3)
-#define S3C2410_TCON_T0INVERT (1<<2)
-#define S3C2410_TCON_T0MANUALUPD (1<<1)
-#define S3C2410_TCON_T0START (1<<0)
-
-#endif /* __ASM_ARCH_REGS_TIMER_H */
-
-
-
diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h
index 4cc99bb1f176..209464adef97 100644
--- a/arch/arm/plat-samsung/include/plat/samsung-time.h
+++ b/arch/arm/plat-samsung/include/plat/samsung-time.h
@@ -22,29 +22,6 @@ enum samsung_timer_mode {
SAMSUNG_PWM4,
};
-struct samsung_timer_source {
- unsigned int event_id;
- unsigned int source_id;
-};
-
-/* Be able to sleep for atleast 4 seconds (usually more) */
-#define SAMSUNG_TIMER_MIN_RANGE 4
-
-#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100)
-#define TCNT_MAX 0xffff
-#define TSCALER_DIV 25
-#define TDIV 50
-#define TSIZE 16
-#else
-#define TCNT_MAX 0xffffffff
-#define TSCALER_DIV 2
-#define TDIV 2
-#define TSIZE 32
-#endif
-
-#define NON_PERIODIC 0
-#define PERIODIC 1
-
extern void __init samsung_set_timer_source(enum samsung_timer_mode event,
enum samsung_timer_mode source);
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index ce1d0f785efd..bf650218b40e 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -260,44 +260,6 @@ static inline void s5pv210_default_sdhci3(void) { }
#endif /* CONFIG_S5PV210_SETUP_SDHCI */
-/* EXYNOS4 SDHCI setup */
-#ifdef CONFIG_EXYNOS4_SETUP_SDHCI
-static inline void exynos4_default_sdhci0(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC
- s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
-#endif
-}
-
-static inline void exynos4_default_sdhci1(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC1
- s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
-#endif
-}
-
-static inline void exynos4_default_sdhci2(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC2
- s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
-#endif
-}
-
-static inline void exynos4_default_sdhci3(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC3
- s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
-#endif
-}
-
-#else
-static inline void exynos4_default_sdhci0(void) { }
-static inline void exynos4_default_sdhci1(void) { }
-static inline void exynos4_default_sdhci2(void) { }
-static inline void exynos4_default_sdhci3(void) { }
-
-#endif /* CONFIG_EXYNOS4_SETUP_SDHCI */
-
static inline void s3c_sdhci_setname(int id, char *name)
{
switch (id) {
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
deleted file mode 100644
index 0fceb4273824..000000000000
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/* arch/arm/plat-samsung/irq-vic-timer.c
- * originally part of arch/arm/plat-s3c64xx/irq.c
- *
- * Copyright 2008 Openmoko, Inc.
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben@simtec.co.uk>
- * http://armlinux.simtec.co.uk/
- *
- * S3C64XX - Interrupt handling
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/irqchip/chained_irq.h>
-#include <linux/io.h>
-
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
-#include <plat/regs-timer.h>
-
-static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
-{
- struct irq_chip *chip = irq_get_chip(irq);
- chained_irq_enter(chip, desc);
- generic_handle_irq((int)desc->irq_data.handler_data);
- chained_irq_exit(chip, desc);
-}
-
-/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
-static void s3c_irq_timer_ack(struct irq_data *d)
-{
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
- u32 mask = (1 << 5) << (d->irq - gc->irq_base);
-
- irq_reg_writel(mask | gc->mask_cache, gc->reg_base);
-}
-
-/**
- * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
- * @num: Number of timers to initialize
- * @timer_irq: Base IRQ number to be used for the timers.
- *
- * Register the necessary IRQ chaining and support for the timer IRQs
- * chained of the VIC.
- */
-void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
-{
- unsigned int pirq[5] = { IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
- IRQ_TIMER3_VIC, IRQ_TIMER4_VIC };
- struct irq_chip_generic *s3c_tgc;
- struct irq_chip_type *ct;
- unsigned int i;
-
-#ifdef CONFIG_ARCH_EXYNOS
- if (soc_is_exynos5250()) {
- pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
- pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
- pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
- pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
- pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
- } else {
- pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
- pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
- pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
- pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
- pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
- }
-#endif
- s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
- S3C64XX_TINT_CSTAT, handle_level_irq);
-
- if (!s3c_tgc) {
- pr_err("%s: irq_alloc_generic_chip for IRQ %d failed\n",
- __func__, timer_irq);
- return;
- }
-
- ct = s3c_tgc->chip_types;
- ct->chip.irq_mask = irq_gc_mask_clr_bit;
- ct->chip.irq_unmask = irq_gc_mask_set_bit;
- ct->chip.irq_ack = s3c_irq_timer_ack;
- irq_setup_generic_chip(s3c_tgc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
- IRQ_NOREQUEST | IRQ_NOPROBE, 0);
- /* Clear the upper bits of the mask_cache*/
- s3c_tgc->mask_cache &= 0x1f;
-
- for (i = 0; i < num; i++, timer_irq++) {
- irq_set_chained_handler(pirq[i], s3c_irq_demux_vic_timer);
- irq_set_handler_data(pirq[i], (void *)timer_irq);
- }
-}
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
deleted file mode 100644
index a35ff3bcffe4..000000000000
--- a/arch/arm/plat-samsung/pwm-clock.c
+++ /dev/null
@@ -1,474 +0,0 @@
-/* linux/arch/arm/plat-s3c24xx/pwm-clock.c
- *
- * Copyright (c) 2007 Simtec Electronics
- * Copyright (c) 2007, 2008 Ben Dooks
- * Ben Dooks <ben-linux@fluff.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/log2.h>
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/irq.h>
-
-#include <plat/clock.h>
-#include <plat/cpu.h>
-
-#include <plat/regs-timer.h>
-#include <plat/pwm-clock.h>
-
-/* Each of the timers 0 through 5 go through the following
- * clock tree, with the inputs depending on the timers.
- *
- * pclk ---- [ prescaler 0 ] -+---> timer 0
- * +---> timer 1
- *
- * pclk ---- [ prescaler 1 ] -+---> timer 2
- * +---> timer 3
- * \---> timer 4
- *
- * Which are fed into the timers as so:
- *
- * prescaled 0 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 0
- * tclk 0 ------------------------------/
- *
- * prescaled 0 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 1
- * tclk 0 ------------------------------/
- *
- *
- * prescaled 1 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 2
- * tclk 1 ------------------------------/
- *
- * prescaled 1 ---- [ div 2,4,8,16 ] ---\
- * [mux] -> timer 3
- * tclk 1 ------------------------------/
- *
- * prescaled 1 ---- [ div 2,4,8, 16 ] --\
- * [mux] -> timer 4
- * tclk 1 ------------------------------/
- *
- * Since the mux and the divider are tied together in the
- * same register space, it is impossible to set the parent
- * and the rate at the same time. To avoid this, we add an
- * intermediate 'prescaled-and-divided' clock to select
- * as the parent for the timer input clock called tdiv.
- *
- * prescaled clk --> pwm-tdiv ---\
- * [ mux ] --> timer X
- * tclk -------------------------/
-*/
-
-static struct clk clk_timer_scaler[];
-
-static unsigned long clk_pwm_scaler_get_rate(struct clk *clk)
-{
- unsigned long tcfg0 = __raw_readl(S3C2410_TCFG0);
-
- if (clk == &clk_timer_scaler[1]) {
- tcfg0 &= S3C2410_TCFG_PRESCALER1_MASK;
- tcfg0 >>= S3C2410_TCFG_PRESCALER1_SHIFT;
- } else {
- tcfg0 &= S3C2410_TCFG_PRESCALER0_MASK;
- }
-
- return clk_get_rate(clk->parent) / (tcfg0 + 1);
-}
-
-static unsigned long clk_pwm_scaler_round_rate(struct clk *clk,
- unsigned long rate)
-{
- unsigned long parent_rate = clk_get_rate(clk->parent);
- unsigned long divisor = parent_rate / rate;
-
- if (divisor > 256)
- divisor = 256;
- else if (divisor < 2)
- divisor = 2;
-
- return parent_rate / divisor;
-}
-
-static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned long round = clk_pwm_scaler_round_rate(clk, rate);
- unsigned long tcfg0;
- unsigned long divisor;
- unsigned long flags;
-
- divisor = clk_get_rate(clk->parent) / round;
- divisor--;
-
- local_irq_save(flags);
- tcfg0 = __raw_readl(S3C2410_TCFG0);
-
- if (clk == &clk_timer_scaler[1]) {
- tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
- tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT;
- } else {
- tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
- tcfg0 |= divisor;
- }
-
- __raw_writel(tcfg0, S3C2410_TCFG0);
- local_irq_restore(flags);
-
- return 0;
-}
-
-static struct clk_ops clk_pwm_scaler_ops = {
- .get_rate = clk_pwm_scaler_get_rate,
- .set_rate = clk_pwm_scaler_set_rate,
- .round_rate = clk_pwm_scaler_round_rate,
-};
-
-static struct clk clk_timer_scaler[] = {
- [0] = {
- .name = "pwm-scaler0",
- .id = -1,
- .ops = &clk_pwm_scaler_ops,
- },
- [1] = {
- .name = "pwm-scaler1",
- .id = -1,
- .ops = &clk_pwm_scaler_ops,
- },
-};
-
-static struct clk clk_timer_tclk[] = {
- [0] = {
- .name = "pwm-tclk0",
- .id = -1,
- },
- [1] = {
- .name = "pwm-tclk1",
- .id = -1,
- },
-};
-
-struct pwm_tdiv_clk {
- struct clk clk;
- unsigned int divisor;
-};
-
-static inline struct pwm_tdiv_clk *to_tdiv(struct clk *clk)
-{
- return container_of(clk, struct pwm_tdiv_clk, clk);
-}
-
-static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk)
-{
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned int divisor;
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- if (pwm_cfg_src_is_tclk(tcfg1))
- divisor = to_tdiv(clk)->divisor;
- else
- divisor = tcfg_to_divisor(tcfg1);
-
- return clk_get_rate(clk->parent) / divisor;
-}
-
-static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk,
- unsigned long rate)
-{
- unsigned long parent_rate;
- unsigned long divisor;
-
- parent_rate = clk_get_rate(clk->parent);
- divisor = parent_rate / rate;
-
- if (divisor <= 1 && pwm_tdiv_has_div1())
- divisor = 1;
- else if (divisor <= 2)
- divisor = 2;
- else if (divisor <= 4)
- divisor = 4;
- else if (divisor <= 8)
- divisor = 8;
- else
- divisor = 16;
-
- return parent_rate / divisor;
-}
-
-static unsigned long clk_pwm_tdiv_bits(struct pwm_tdiv_clk *divclk)
-{
- return pwm_tdiv_div_bits(divclk->divisor);
-}
-
-static void clk_pwm_tdiv_update(struct pwm_tdiv_clk *divclk)
-{
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned long bits = clk_pwm_tdiv_bits(divclk);
- unsigned long flags;
- unsigned long shift = S3C2410_TCFG1_SHIFT(divclk->clk.id);
-
- local_irq_save(flags);
-
- tcfg1 = __raw_readl(S3C2410_TCFG1);
- tcfg1 &= ~(S3C2410_TCFG1_MUX_MASK << shift);
- tcfg1 |= bits << shift;
- __raw_writel(tcfg1, S3C2410_TCFG1);
-
- local_irq_restore(flags);
-}
-
-static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
-{
- struct pwm_tdiv_clk *divclk = to_tdiv(clk);
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned long parent_rate = clk_get_rate(clk->parent);
- unsigned long divisor;
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- rate = clk_round_rate(clk, rate);
- divisor = parent_rate / rate;
-
- if (divisor > 16)
- return -EINVAL;
-
- divclk->divisor = divisor;
-
- /* Update the current MUX settings if we are currently
- * selected as the clock source for this clock. */
-
- if (!pwm_cfg_src_is_tclk(tcfg1))
- clk_pwm_tdiv_update(divclk);
-
- return 0;
-}
-
-static struct clk_ops clk_tdiv_ops = {
- .get_rate = clk_pwm_tdiv_get_rate,
- .set_rate = clk_pwm_tdiv_set_rate,
- .round_rate = clk_pwm_tdiv_round_rate,
-};
-
-static struct pwm_tdiv_clk clk_timer_tdiv[] = {
- [0] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.0",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[0],
- },
- },
- [1] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.1",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[0],
- }
- },
- [2] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.2",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[1],
- },
- },
- [3] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.3",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[1],
- },
- },
- [4] = {
- .clk = {
- .name = "pwm-tdiv",
- .devname = "s3c24xx-pwm.4",
- .ops = &clk_tdiv_ops,
- .parent = &clk_timer_scaler[1],
- },
- },
-};
-
-static int __init clk_pwm_tdiv_register(unsigned int id)
-{
- struct pwm_tdiv_clk *divclk = &clk_timer_tdiv[id];
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- divclk->clk.id = id;
- divclk->divisor = tcfg_to_divisor(tcfg1);
-
- return s3c24xx_register_clock(&divclk->clk);
-}
-
-static inline struct clk *s3c24xx_pwmclk_tclk(unsigned int id)
-{
- return (id >= 2) ? &clk_timer_tclk[1] : &clk_timer_tclk[0];
-}
-
-static inline struct clk *s3c24xx_pwmclk_tdiv(unsigned int id)
-{
- return &clk_timer_tdiv[id].clk;
-}
-
-static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
-{
- unsigned int id = clk->id;
- unsigned long tcfg1;
- unsigned long flags;
- unsigned long bits;
- unsigned long shift = S3C2410_TCFG1_SHIFT(id);
-
- unsigned long mux_tclk;
-
- if (soc_is_s3c24xx())
- mux_tclk = S3C2410_TCFG1_MUX_TCLK;
- else if (soc_is_s5p6440() || soc_is_s5p6450())
- mux_tclk = 0;
- else
- mux_tclk = S3C64XX_TCFG1_MUX_TCLK;
-
- if (parent == s3c24xx_pwmclk_tclk(id))
- bits = mux_tclk << shift;
- else if (parent == s3c24xx_pwmclk_tdiv(id))
- bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
- else
- return -EINVAL;
-
- clk->parent = parent;
-
- local_irq_save(flags);
-
- tcfg1 = __raw_readl(S3C2410_TCFG1);
- tcfg1 &= ~(S3C2410_TCFG1_MUX_MASK << shift);
- __raw_writel(tcfg1 | bits, S3C2410_TCFG1);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static struct clk_ops clk_tin_ops = {
- .set_parent = clk_pwm_tin_set_parent,
-};
-
-static struct clk clk_tin[] = {
- [0] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.0",
- .id = 0,
- .ops = &clk_tin_ops,
- },
- [1] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.1",
- .id = 1,
- .ops = &clk_tin_ops,
- },
- [2] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.2",
- .id = 2,
- .ops = &clk_tin_ops,
- },
- [3] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.3",
- .id = 3,
- .ops = &clk_tin_ops,
- },
- [4] = {
- .name = "pwm-tin",
- .devname = "s3c24xx-pwm.4",
- .id = 4,
- .ops = &clk_tin_ops,
- },
-};
-
-static __init int clk_pwm_tin_register(struct clk *pwm)
-{
- unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
- unsigned int id = pwm->id;
-
- struct clk *parent;
- int ret;
-
- ret = s3c24xx_register_clock(pwm);
- if (ret < 0)
- return ret;
-
- tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
- tcfg1 &= S3C2410_TCFG1_MUX_MASK;
-
- if (pwm_cfg_src_is_tclk(tcfg1))
- parent = s3c24xx_pwmclk_tclk(id);
- else
- parent = s3c24xx_pwmclk_tdiv(id);
-
- return clk_set_parent(pwm, parent);
-}
-
-/**
- * s3c_pwmclk_init() - initialise pwm clocks
- *
- * Initialise and register the clocks which provide the inputs for the
- * pwm timer blocks.
- *
- * Note, this call is required by the time core, so must be called after
- * the base clocks are added and before any of the initcalls are run.
- */
-__init void s3c_pwmclk_init(void)
-{
- struct clk *clk_timers;
- unsigned int clk;
- int ret;
-
- clk_timers = clk_get(NULL, "timers");
- if (IS_ERR(clk_timers)) {
- printk(KERN_ERR "%s: no parent clock\n", __func__);
- return;
- }
-
- for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
- clk_timer_scaler[clk].parent = clk_timers;
-
- s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
- s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
-
- for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
- ret = clk_pwm_tdiv_register(clk);
-
- if (ret < 0) {
- printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
- return;
- }
- }
-
- for (clk = 0; clk < ARRAY_SIZE(clk_tin); clk++) {
- ret = clk_pwm_tin_register(&clk_tin[clk]);
- if (ret < 0) {
- printk(KERN_ERR "error adding pwm%d tin clock\n", clk);
- return;
- }
- }
-}
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
index ff1a76011b1e..ddfaca9c79d8 100644
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -17,9 +17,7 @@
#include <mach/irqs.h>
#include <mach/map.h>
-#include <plat/regs-timer.h>
#include <plat/cpu.h>
-#include <plat/irq-vic-timer.h>
void __init s5p_init_irq(u32 *vic, u32 num_vic)
{
@@ -30,6 +28,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
for (irq = 0; irq < num_vic; irq++)
vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
#endif
-
- s3c_init_vic_timer_irq(5, IRQ_TIMER0);
}
diff --git a/arch/arm/plat-samsung/samsung-time.c b/arch/arm/plat-samsung/samsung-time.c
deleted file mode 100644
index 2957075ca836..000000000000
--- a/arch/arm/plat-samsung/samsung-time.c
+++ /dev/null
@@ -1,394 +0,0 @@
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * samsung - Common hr-timer support (s3c and s5p)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/clockchips.h>
-#include <linux/platform_device.h>
-#include <linux/sched_clock.h>
-
-#include <asm/smp_twd.h>
-#include <asm/mach/time.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include <mach/map.h>
-#include <plat/devs.h>
-#include <plat/regs-timer.h>
-#include <plat/samsung-time.h>
-
-static struct clk *tin_event;
-static struct clk *tin_source;
-static struct clk *tdiv_event;
-static struct clk *tdiv_source;
-static struct clk *timerclk;
-static struct samsung_timer_source timer_source;
-static unsigned long clock_count_per_tick;
-static void samsung_timer_resume(void);
-
-static void samsung_time_stop(enum samsung_timer_mode mode)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon &= ~S3C2410_TCON_T0START;
- break;
-
- case SAMSUNG_PWM1:
- tcon &= ~S3C2410_TCON_T1START;
- break;
-
- case SAMSUNG_PWM2:
- tcon &= ~S3C2410_TCON_T2START;
- break;
-
- case SAMSUNG_PWM3:
- tcon &= ~S3C2410_TCON_T3START;
- break;
-
- case SAMSUNG_PWM4:
- tcon &= ~S3C2410_TCON_T4START;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_setup(enum samsung_timer_mode mode, unsigned long tcnt)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- tcnt--;
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon &= ~(0x0f << 0);
- tcon |= S3C2410_TCON_T0MANUALUPD;
- break;
-
- case SAMSUNG_PWM1:
- tcon &= ~(0x0f << 8);
- tcon |= S3C2410_TCON_T1MANUALUPD;
- break;
-
- case SAMSUNG_PWM2:
- tcon &= ~(0x0f << 12);
- tcon |= S3C2410_TCON_T2MANUALUPD;
- break;
-
- case SAMSUNG_PWM3:
- tcon &= ~(0x0f << 16);
- tcon |= S3C2410_TCON_T3MANUALUPD;
- break;
-
- case SAMSUNG_PWM4:
- tcon &= ~(0x07 << 20);
- tcon |= S3C2410_TCON_T4MANUALUPD;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", mode);
- break;
- }
-
- __raw_writel(tcnt, S3C2410_TCNTB(mode));
- __raw_writel(tcnt, S3C2410_TCMPB(mode));
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static void samsung_time_start(enum samsung_timer_mode mode, bool periodic)
-{
- unsigned long tcon;
-
- tcon = __raw_readl(S3C2410_TCON);
-
- switch (mode) {
- case SAMSUNG_PWM0:
- tcon |= S3C2410_TCON_T0START;
- tcon &= ~S3C2410_TCON_T0MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T0RELOAD;
- else
- tcon &= ~S3C2410_TCON_T0RELOAD;
- break;
-
- case SAMSUNG_PWM1:
- tcon |= S3C2410_TCON_T1START;
- tcon &= ~S3C2410_TCON_T1MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T1RELOAD;
- else
- tcon &= ~S3C2410_TCON_T1RELOAD;
- break;
-
- case SAMSUNG_PWM2:
- tcon |= S3C2410_TCON_T2START;
- tcon &= ~S3C2410_TCON_T2MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T2RELOAD;
- else
- tcon &= ~S3C2410_TCON_T2RELOAD;
- break;
-
- case SAMSUNG_PWM3:
- tcon |= S3C2410_TCON_T3START;
- tcon &= ~S3C2410_TCON_T3MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T3RELOAD;
- else
- tcon &= ~S3C2410_TCON_T3RELOAD;
- break;
-
- case SAMSUNG_PWM4:
- tcon |= S3C2410_TCON_T4START;
- tcon &= ~S3C2410_TCON_T4MANUALUPD;
-
- if (periodic)
- tcon |= S3C2410_TCON_T4RELOAD;
- else
- tcon &= ~S3C2410_TCON_T4RELOAD;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", mode);
- break;
- }
- __raw_writel(tcon, S3C2410_TCON);
-}
-
-static int samsung_set_next_event(unsigned long cycles,
- struct clock_event_device *evt)
-{
- samsung_time_setup(timer_source.event_id, cycles);
- samsung_time_start(timer_source.event_id, NON_PERIODIC);
-
- return 0;
-}
-
-static void samsung_set_mode(enum clock_event_mode mode,
- struct clock_event_device *evt)
-{
- samsung_time_stop(timer_source.event_id);
-
- switch (mode) {
- case CLOCK_EVT_MODE_PERIODIC:
- samsung_time_setup(timer_source.event_id, clock_count_per_tick);
- samsung_time_start(timer_source.event_id, PERIODIC);
- break;
-
- case CLOCK_EVT_MODE_ONESHOT:
- break;
-
- case CLOCK_EVT_MODE_UNUSED:
- case CLOCK_EVT_MODE_SHUTDOWN:
- break;
-
- case CLOCK_EVT_MODE_RESUME:
- samsung_timer_resume();
- break;
- }
-}
-
-static void samsung_timer_resume(void)
-{
- /* event timer restart */
- samsung_time_setup(timer_source.event_id, clock_count_per_tick);
- samsung_time_start(timer_source.event_id, PERIODIC);
-
- /* source timer restart */
- samsung_time_setup(timer_source.source_id, TCNT_MAX);
- samsung_time_start(timer_source.source_id, PERIODIC);
-}
-
-void __init samsung_set_timer_source(enum samsung_timer_mode event,
- enum samsung_timer_mode source)
-{
- s3c_device_timer[event].dev.bus = &platform_bus_type;
- s3c_device_timer[source].dev.bus = &platform_bus_type;
-
- timer_source.event_id = event;
- timer_source.source_id = source;
-}
-
-static struct clock_event_device time_event_device = {
- .name = "samsung_event_timer",
- .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
- .rating = 200,
- .set_next_event = samsung_set_next_event,
- .set_mode = samsung_set_mode,
-};
-
-static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
-{
- struct clock_event_device *evt = dev_id;
-
- evt->event_handler(evt);
-
- return IRQ_HANDLED;
-}
-
-static struct irqaction samsung_clock_event_irq = {
- .name = "samsung_time_irq",
- .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
- .handler = samsung_clock_event_isr,
- .dev_id = &time_event_device,
-};
-
-static void __init samsung_clockevent_init(void)
-{
- unsigned long pclk;
- unsigned long clock_rate;
- unsigned int irq_number;
- struct clk *tscaler;
-
- pclk = clk_get_rate(timerclk);
-
- tscaler = clk_get_parent(tdiv_event);
-
- clk_set_rate(tscaler, pclk / TSCALER_DIV);
- clk_set_rate(tdiv_event, pclk / TDIV);
- clk_set_parent(tin_event, tdiv_event);
-
- clock_rate = clk_get_rate(tin_event);
- clock_count_per_tick = clock_rate / HZ;
-
- time_event_device.cpumask = cpumask_of(0);
- clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
-
- irq_number = timer_source.event_id + IRQ_TIMER0;
- setup_irq(irq_number, &samsung_clock_event_irq);
-}
-
-static void __iomem *samsung_timer_reg(void)
-{
- unsigned long offset = 0;
-
- switch (timer_source.source_id) {
- case SAMSUNG_PWM0:
- case SAMSUNG_PWM1:
- case SAMSUNG_PWM2:
- case SAMSUNG_PWM3:
- offset = (timer_source.source_id * 0x0c) + 0x14;
- break;
-
- case SAMSUNG_PWM4:
- offset = 0x40;
- break;
-
- default:
- printk(KERN_ERR "Invalid Timer %d\n", timer_source.source_id);
- return NULL;
- }
-
- return S3C_TIMERREG(offset);
-}
-
-/*
- * Override the global weak sched_clock symbol with this
- * local implementation which uses the clocksource to get some
- * better resolution when scheduling the kernel. We accept that
- * this wraps around for now, since it is just a relative time
- * stamp. (Inspired by U300 implementation.)
- */
-static u32 notrace samsung_read_sched_clock(void)
-{
- void __iomem *reg = samsung_timer_reg();
-
- if (!reg)
- return 0;
-
- return ~__raw_readl(reg);
-}
-
-static void __init samsung_clocksource_init(void)
-{
- unsigned long pclk;
- unsigned long clock_rate;
-
- pclk = clk_get_rate(timerclk);
-
- clk_set_rate(tdiv_source, pclk / TDIV);
- clk_set_parent(tin_source, tdiv_source);
-
- clock_rate = clk_get_rate(tin_source);
-
- samsung_time_setup(timer_source.source_id, TCNT_MAX);
- samsung_time_start(timer_source.source_id, PERIODIC);
-
- setup_sched_clock(samsung_read_sched_clock, TSIZE, clock_rate);
-
- if (clocksource_mmio_init(samsung_timer_reg(), "samsung_clocksource_timer",
- clock_rate, 250, TSIZE, clocksource_mmio_readl_down))
- panic("samsung_clocksource_timer: can't register clocksource\n");
-}
-
-static void __init samsung_timer_resources(void)
-{
-
- unsigned long event_id = timer_source.event_id;
- unsigned long source_id = timer_source.source_id;
- char devname[15];
-
- timerclk = clk_get(NULL, "timers");
- if (IS_ERR(timerclk))
- panic("failed to get timers clock for timer");
-
- clk_enable(timerclk);
-
- sprintf(devname, "s3c24xx-pwm.%lu", event_id);
- s3c_device_timer[event_id].id = event_id;
- s3c_device_timer[event_id].dev.init_name = devname;
-
- tin_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tin");
- if (IS_ERR(tin_event))
- panic("failed to get pwm-tin clock for event timer");
-
- tdiv_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tdiv");
- if (IS_ERR(tdiv_event))
- panic("failed to get pwm-tdiv clock for event timer");
-
- clk_enable(tin_event);
-
- sprintf(devname, "s3c24xx-pwm.%lu", source_id);
- s3c_device_timer[source_id].id = source_id;
- s3c_device_timer[source_id].dev.init_name = devname;
-
- tin_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tin");
- if (IS_ERR(tin_source))
- panic("failed to get pwm-tin clock for source timer");
-
- tdiv_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tdiv");
- if (IS_ERR(tdiv_source))
- panic("failed to get pwm-tdiv clock for source timer");
-
- clk_enable(tin_source);
-}
-
-void __init samsung_timer_init(void)
-{
- samsung_timer_resources();
- samsung_clockevent_init();
- samsung_clocksource_init();
-}