diff options
| author | Haibo Chen <haibo.chen@nxp.com> | 2018-02-09 18:02:18 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:30:57 +0800 |
| commit | 850fea3d344b24e4717d1482f8d284a80d88c169 (patch) | |
| tree | 3ded1a6a297c9dda22fb8dacb0d2a48197f4f2d0 /arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts | |
| parent | 33b59f53eb1d1dee002042740e4ae71f86905e53 (diff) | |
MLK-17579 ARM64: dts: correct the pad setting for imx8 usdhc
according to IC suggestion, usdhc clock pad need to be configed as
input/output mode, for other usdhc pad, including the strobe pad, need
to be configed as normal mode.
This patch do the change on the imx8qxp and imx8qm board.
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts index 13dd2dbc5d3b..e08349d7a0bb 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts @@ -362,7 +362,7 @@ SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000041 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000041 SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021 >; }; @@ -379,7 +379,7 @@ SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040 SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 >; }; @@ -396,7 +396,7 @@ SC_P_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 SC_P_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 SC_P_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 - SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040 + SC_P_EMMC0_STROBE_CONN_EMMC0_STROBE 0x00000040 SC_P_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 >; }; |