summaryrefslogtreecommitdiff
path: root/arch/arm
diff options
context:
space:
mode:
authorRobby Cai <R63905@freescale.com>2012-09-03 13:54:33 +0800
committerRobby Cai <R63905@freescale.com>2012-09-03 14:10:02 +0800
commitf96b367fdd4b1db2c01e6aa59a825c5e6873efa4 (patch)
tree4057388d64f6612d4ba51e7dae6efb8e43e63f27 /arch/arm
parentf3ff4c24af4d5bff0bb275e79c779c22d1263797 (diff)
ENGR00222841: mx6sl: pgc: display power gating causes PxP processing timeout
For safety, DO NOT enable display power gating feature for MX6SL EVK. Otherwise will meet PxP processing timeout when run EPDC unit test. The cause is under investigation. Signed-off-by: Robby Cai <R63905@freescale.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx6/pm.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/pm.c b/arch/arm/mach-mx6/pm.c
index dd5db57c984b..711972cca799 100644
--- a/arch/arm/mach-mx6/pm.c
+++ b/arch/arm/mach-mx6/pm.c
@@ -235,8 +235,14 @@ static void gpu_power_up(void)
udelay(10);
}
+/*
+ * For safety, DO NOT define ENABLE_DISP_POWER_GATING for MX6SL EVK.
+ * Otherwise will meet PxP processing timeout When run EPDC unit test.
+ * The cause is under investigation.
+ */
static void disp_power_down(void)
{
+#ifdef ENABLE_DISP_POWER_GATING
if (cpu_is_mx6sl()) {
__raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PUPSCR_OFFSET);
__raw_writel(0xFFFFFFFF, gpc_base + GPC_PGC_DISP_PDNSCR_OFFSET);
@@ -244,15 +250,18 @@ static void disp_power_down(void)
__raw_writel(0x1, gpc_base + GPC_PGC_DISP_PGCR_OFFSET);
__raw_writel(0x10, gpc_base + GPC_CNTR_OFFSET);
}
+#endif
}
static void disp_power_up(void)
{
+#ifdef ENABLE_DISP_POWER_GATING
if (cpu_is_mx6sl()) {
__raw_writel(0x0, gpc_base + GPC_PGC_DISP_PGCR_OFFSET);
__raw_writel(0x20, gpc_base + GPC_CNTR_OFFSET);
__raw_writel(0x1, gpc_base + GPC_PGC_DISP_SR_OFFSET);
}
+#endif
}
static void mx6_suspend_store(void)