diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2017-04-18 11:29:51 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2017-05-30 13:47:52 -0700 |
| commit | 58dfa31fe18797a0e9834ad415ad51a68308a734 (patch) | |
| tree | 9fec222e4281e3ae582ae1a5cdc323ab1c58e21a /arch/arm | |
| parent | b6798bb5050a786f7cdd2a47db8029fee74e36fe (diff) | |
ARM: dts: imx6qdl-colibri: only add weim pinmuxing once
Some pads are part of two pingroup nodes both added to the iomuxc
pinctrl-0. Clean that up, so that
- weim_gpio-2 only contains the pads which one might mux for
a 24bit display interface instead of gpio.
- weim_gpio-6 only contains the pads which one might mux for
flexcan2.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-colibri.dtsi | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi index 195f6bf6f320..2aa3797bcd09 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -843,33 +843,23 @@ >; }; - /* ADDRESS[16:18] [25] used as GPIO */ + /* ADDRESS[17:18] [25] used as GPIO */ pinctrl_weim_gpio_1: weim_gpio-1 { fsl,pins = < - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 PAD_CTRL_HYS_PU MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 PAD_CTRL_HYS_PU MX6QDL_PAD_KEY_COL2__GPIO4_IO10 PAD_CTRL_HYS_PU - MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 PAD_CTRL_HYS_PU - MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 PAD_CTRL_HYS_PU - MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 PAD_CTRL_HYS_PU - MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 PAD_CTRL_HYS_PU - MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 PAD_CTRL_HYS_PU - MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 PAD_CTRL_HYS_PU MX6QDL_PAD_NANDF_D1__GPIO2_IO01 PAD_CTRL_HYS_PU >; }; /* ADDRESS[19:24] used as GPIO */ pinctrl_weim_gpio_2: weim_gpio-2 { fsl,pins = < - MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 PAD_CTRL_HYS_PU - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 PAD_CTRL_HYS_PU MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 PAD_CTRL_HYS_PU MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 PAD_CTRL_HYS_PU MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 PAD_CTRL_HYS_PU MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 PAD_CTRL_HYS_PU MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 PAD_CTRL_HYS_PU MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 PAD_CTRL_HYS_PU - MX6QDL_PAD_NANDF_D1__GPIO2_IO01 PAD_CTRL_HYS_PU >; }; /* DATA[16:31] used as GPIO */ |