diff options
| author | Robin Gong <b38343@freescale.com> | 2015-08-13 16:14:42 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 10:59:37 -0600 |
| commit | 697812ccb57abf7be51c6733cc3da40636b59c72 (patch) | |
| tree | 6173a673795f4b6d688e09f60a8d435e36c7eb87 /arch/arm | |
| parent | 6d7bc6c15e98f2c4c2de7f1f73afa705ca68a84e (diff) | |
MLK-11344-10: ARM: dts: imx7d-12x12-lpddr3-arm2-ecspi: add ecspi support
Enable ecspi dtb for imx7d-12x12-lpddr3-arm2 board.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-ecspi.dts | 26 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts | 32 |
3 files changed, 58 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index da6a534edfc0..80a8d8775836 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -319,6 +319,7 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ dtb-$(CONFIG_SOC_IMX7D) += \ imx7d-12x12-lpddr3-arm2.dtb \ imx7d-12x12-lpddr3-arm2-m4.dtb \ + imx7d-12x12-lpddr3-arm2-ecspi.dtb \ imx7d-sdb.dtb \ imx7d-sdb-m4.dtb dtb-$(CONFIG_SOC_LS1021A) += \ diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-ecspi.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-ecspi.dts new file mode 100644 index 000000000000..b74863f07fdb --- /dev/null +++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2-ecspi.dts @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2015 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "imx7d-12x12-lpddr3-arm2.dts" + +&epdc { + status = "disabled"; +}; + +&ecspi1{ + status = "okay"; +}; + +/* + * pin conflict with ecspi1 + * default hog setting conflicts with ECSPI1 MOSI and MISO + * EPDC PWRCTRL conflicts with ECSPI1 CS pin + */ +&iomuxc { + pinctrl-0 = <&pinctrl_hog_1>; +}; diff --git a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts index 71c4cfb827fe..137c0699a1a8 100644 --- a/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts +++ b/arch/arm/boot/dts/imx7d-12x12-lpddr3-arm2.dts @@ -80,6 +80,22 @@ arm-supply = <&sw1a_reg>; }; +&ecspi1 { + fsl,spi-num-chipselects = <1>; + cs-gpios = <&gpio4 19 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1_1 &pinctrl_ecspi1_cs_1>; + status = "disabled"; + + spi_flash1: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p32"; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet1>; @@ -237,6 +253,21 @@ pinctrl-0 = <&pinctrl_hog_1>; imx7d-12x12-lpddr3-arm2 { + + pinctrl_ecspi1_cs_1: ecspi1_cs_grp-1 { + fsl,pins = < + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x2 + >; + }; + + pinctrl_ecspi1_1: ecspi1grp-1 { + fsl,pins = < + MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2 + MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2 + MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2 + >; + }; + pinctrl_enet1: enet1grp { fsl,pins = < MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x3 @@ -281,7 +312,6 @@ MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x80000000 MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x80000000 MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x80000000 - MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x80000000 MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x17059 MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x17059 MX7D_PAD_SD1_WP__GPIO5_IO1 0x17059 |