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authorJesper Nilsson <jesper.nilsson@axis.com>2010-08-03 18:53:50 +0200
committerJesper Nilsson <jesper.nilsson@axis.com>2010-08-04 13:02:35 +0200
commit32e7a8ba8d435d03752be818a82748c5e3eadc36 (patch)
tree5da38f48f291f27bc83be9c30fd40943f2a007f9 /arch/cris/include
parent243ba2fa461a22e01e5905dd299babeaeeb418e2 (diff)
CRIS: Machine dependent memmap.h
Move the old one to mach-fs and replace with a new one that only include the correct one for the machine architecture. Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Diffstat (limited to 'arch/cris/include')
-rw-r--r--arch/cris/include/arch-v32/arch/memmap.h25
-rw-r--r--arch/cris/include/arch-v32/mach-fs/mach/memmap.h24
2 files changed, 25 insertions, 24 deletions
diff --git a/arch/cris/include/arch-v32/arch/memmap.h b/arch/cris/include/arch-v32/arch/memmap.h
index d29df5644d3e..81985c0a6789 100644
--- a/arch/cris/include/arch-v32/arch/memmap.h
+++ b/arch/cris/include/arch-v32/arch/memmap.h
@@ -1,24 +1 @@
-#ifndef _ASM_ARCH_MEMMAP_H
-#define _ASM_ARCH_MEMMAP_H
-
-#define MEM_CSE0_START (0x00000000)
-#define MEM_CSE0_SIZE (0x04000000)
-#define MEM_CSE1_START (0x04000000)
-#define MEM_CSE1_SIZE (0x04000000)
-#define MEM_CSR0_START (0x08000000)
-#define MEM_CSR1_START (0x0c000000)
-#define MEM_CSP0_START (0x10000000)
-#define MEM_CSP1_START (0x14000000)
-#define MEM_CSP2_START (0x18000000)
-#define MEM_CSP3_START (0x1c000000)
-#define MEM_CSP4_START (0x20000000)
-#define MEM_CSP5_START (0x24000000)
-#define MEM_CSP6_START (0x28000000)
-#define MEM_CSP7_START (0x2c000000)
-#define MEM_INTMEM_START (0x38000000)
-#define MEM_INTMEM_SIZE (0x00020000)
-#define MEM_DRAM_START (0x40000000)
-
-#define MEM_NON_CACHEABLE (0x80000000)
-
-#endif
+#include <mach/memmap.h>
diff --git a/arch/cris/include/arch-v32/mach-fs/mach/memmap.h b/arch/cris/include/arch-v32/mach-fs/mach/memmap.h
new file mode 100644
index 000000000000..d29df5644d3e
--- /dev/null
+++ b/arch/cris/include/arch-v32/mach-fs/mach/memmap.h
@@ -0,0 +1,24 @@
+#ifndef _ASM_ARCH_MEMMAP_H
+#define _ASM_ARCH_MEMMAP_H
+
+#define MEM_CSE0_START (0x00000000)
+#define MEM_CSE0_SIZE (0x04000000)
+#define MEM_CSE1_START (0x04000000)
+#define MEM_CSE1_SIZE (0x04000000)
+#define MEM_CSR0_START (0x08000000)
+#define MEM_CSR1_START (0x0c000000)
+#define MEM_CSP0_START (0x10000000)
+#define MEM_CSP1_START (0x14000000)
+#define MEM_CSP2_START (0x18000000)
+#define MEM_CSP3_START (0x1c000000)
+#define MEM_CSP4_START (0x20000000)
+#define MEM_CSP5_START (0x24000000)
+#define MEM_CSP6_START (0x28000000)
+#define MEM_CSP7_START (0x2c000000)
+#define MEM_INTMEM_START (0x38000000)
+#define MEM_INTMEM_SIZE (0x00020000)
+#define MEM_DRAM_START (0x40000000)
+
+#define MEM_NON_CACHEABLE (0x80000000)
+
+#endif