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authorDavid Mosberger-Tang <davidm@hpl.hp.com>2005-04-27 21:16:07 -0700
committerTony Luck <tony.luck@intel.com>2005-04-27 21:16:07 -0700
commit96e017495e6833adcbad84783e3c5eb685836bbf (patch)
tree41504d1ba4f94282d109224936ae6829109c3e6d /arch/ia64/kernel/entry.S
parent3c79c8b1d92a9ae3edf3cbcd2c43c553ee0f1d83 (diff)
[IA64] On return from syscall, hint b7 with __kernel_syscall_via_epc().
Why is this a good idea? Clearing b7 to 0 is guaranteed to do us no good and writing it with __kernel_syscall_via_epc() yields a 6 cycle improvement _if_ the application performs another EPC-based system- call without overwriting b7, which is not all that uncommon. Well worth the minimal cost of 1 bundle of code. Signed-off-by: David Mosberger-Tang <davidm@hpl.hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/entry.S')
-rw-r--r--arch/ia64/kernel/entry.S9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/ia64/kernel/entry.S b/arch/ia64/kernel/entry.S
index 0c84bed1bda9..6359d7ffbb7c 100644
--- a/arch/ia64/kernel/entry.S
+++ b/arch/ia64/kernel/entry.S
@@ -692,7 +692,7 @@ ENTRY(ia64_leave_syscall)
;;
(p6) ld4 r31=[r18] // load current_thread_info()->flags
ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
- mov b7=r0 // clear b7
+ nop.i 0
;;
ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
ld8 r18=[r2],PT(R9)-PT(B6) // load b6
@@ -754,7 +754,14 @@ ENTRY(ia64_leave_syscall)
(pUStk) ld4 r17=[r3] // r17 = cpu_data->phys_stacked_size_p8
mov.m ar.csd=r0 // M2 clear ar.csd
mov f10=f0 // clear f10
+
+ nop.m 0
+ movl r14=__kernel_syscall_via_epc // X
;;
+ nop.m 0
+ nop.m 0
+ mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
+
mov r14=r0 // clear r14
mov f11=f0 // clear f11
(pKStk) br.cond.dpnt.many skip_rbs_switch