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authorGreg Ungerer <gerg@uclinux.org>2011-03-06 00:54:36 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 21:01:54 +1000
commitbabc08b7e953cd23e10d175d546309dedadaabea (patch)
treec07f8453f667c6f83770048d06523f8ef9a9205b /arch/m68k/include/asm/m5407sim.h
parenta0ba4332a2cb110d6ef7695e64887396ab7d09d6 (diff)
m68knommu: move ColdFire DMA register addresses to per-cpu headers
The base addresses of the ColdFire DMA unit registers belong with all the other address definitions in the per-cpu headers. The current definitions assume they are relative to an MBAR register. Not all ColdFire CPUs have an MBAR register. A clean address define can only be acheived in the per-cpu headers along with all the other chips peripheral base addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5407sim.h')
-rw-r--r--arch/m68k/include/asm/m5407sim.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 75f5c28a551d..70181727326f 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -85,6 +85,14 @@
#define MCFSIM_PADAT (MCF_MBAR + 0x248)
/*
+ * DMA unit base addresses.
+ */
+#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */
+#define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */
+#define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */
+#define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */
+
+/*
* Generic GPIO support
*/
#define MCFGPIO_PIN_MAX 16