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authorGreg Ungerer <gerg@uclinux.org>2011-03-09 09:57:14 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-03-15 21:01:54 +1000
commit58f0ac98f386d2b335e5852e8feec828c43a0e13 (patch)
treee5155ca33386026a9d0b7b2e0de00514f76fd295 /arch/m68k
parentbabc08b7e953cd23e10d175d546309dedadaabea (diff)
m68knommu: remove use of MBAR in old-style ColdFire timer
Not all ColdFire CPUs that use the old style timer hardware module use an MBAR set peripheral region. Move the TIMER base address defines to the per-CPU header files where we can set it correctly based on how the peripherals are mapped - instead of using a fake MBAR for some platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/m5206sim.h3
-rw-r--r--arch/m68k/include/asm/m5249sim.h8
-rw-r--r--arch/m68k/include/asm/m5272sim.h5
-rw-r--r--arch/m68k/include/asm/m5307sim.h6
-rw-r--r--arch/m68k/include/asm/m532xsim.h8
-rw-r--r--arch/m68k/include/asm/m5407sim.h6
-rw-r--r--arch/m68k/include/asm/mcftimer.h23
7 files changed, 35 insertions, 24 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 6fb656f18455..7b58da5050a0 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -89,6 +89,9 @@
#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */
#endif
+#define MCFTIMER_BASE1 (MCF_MBAR + 0x100) /* Base of TIMER1 */
+#define MCFTIMER_BASE2 (MCF_MBAR + 0x120) /* Base of TIMER2 */
+
#define MCFSIM_PADDR (MCF_MBAR + 0x1c5) /* Parallel Direction (r/w) */
#define MCFSIM_PADAT (MCF_MBAR + 0x1c9) /* Parallel Port Value (r/w) */
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index aefb83ef8392..c318ce786f93 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -19,7 +19,7 @@
/*
* The 5249 has a second MBAR region, define its address.
*/
-#define MCF_MBAR2 0x80000000
+#define MCF_MBAR2 0x80000000
/*
* Define the 5249 SIM register set addresses.
@@ -67,6 +67,12 @@
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
/*
+ * Timer module.
+ */
+#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
+#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
+
+/*
* UART module.
*/
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 3b43fee72573..57ca4de1f911 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -82,6 +82,11 @@
#define MCFDMA_BASE0 (MCF_MBAR + 0xe0) /* Base address DMA 0 */
+#define MCFTIMER_BASE1 (MCF_MBAR + 0x200) /* Base address TIMER1 */
+#define MCFTIMER_BASE2 (MCF_MBAR + 0x220) /* Base address TIMER2 */
+#define MCFTIMER_BASE3 (MCF_MBAR + 0x240) /* Base address TIMER4 */
+#define MCFTIMER_BASE4 (MCF_MBAR + 0x260) /* Base address TIMER3 */
+
/*
* Define system peripheral IRQ usage.
*/
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 39285769c0e2..c3846fcfa5d1 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -95,6 +95,12 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
+/*
+ * Timer module.
+ */
+#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
+#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
+
#define MCFSIM_PADDR (MCF_MBAR + 0x244)
#define MCFSIM_PADAT (MCF_MBAR + 0x248)
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index e6470f8ca324..0dea126f3fcf 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -85,6 +85,14 @@
#define MCFUART_BASE2 0xFC064000 /* Base address of UART2 */
#define MCFUART_BASE3 0xFC068000 /* Base address of UART3 */
+/*
+ * Timer module.
+ */
+#define MCFTIMER_BASE1 0xFC070000 /* Base address of TIMER1 */
+#define MCFTIMER_BASE2 0xFC074000 /* Base address of TIMER2 */
+#define MCFTIMER_BASE3 0xFC078000 /* Base address of TIMER3 */
+#define MCFTIMER_BASE4 0xFC07C000 /* Base address of TIMER4 */
+
/*********************************************************************
*
* Reset Controller Module
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 70181727326f..43272584dc09 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -78,6 +78,12 @@
#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
+/*
+ * Timer module.
+ */
+#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
+#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
+
#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
#define MCFUART_BASE2 0x200 /* Base address of UART2 */
diff --git a/arch/m68k/include/asm/mcftimer.h b/arch/m68k/include/asm/mcftimer.h
index 0f90f6d2227a..92b276fe8240 100644
--- a/arch/m68k/include/asm/mcftimer.h
+++ b/arch/m68k/include/asm/mcftimer.h
@@ -12,29 +12,6 @@
#define mcftimer_h
/****************************************************************************/
-
-/*
- * Get address specific defines for this ColdFire member.
- */
-#if defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
-#elif defined(CONFIG_M5272)
-#define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */
-#define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */
-#define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
-#elif defined(CONFIG_M532x)
-#define MCFTIMER_BASE1 0xfc070000 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0xfc074000 /* Base address of TIMER2 */
-#define MCFTIMER_BASE3 0xfc078000 /* Base address of TIMER3 */
-#define MCFTIMER_BASE4 0xfc07c000 /* Base address of TIMER4 */
-#endif
-
-
/*
* Define the TIMER register set addresses.
*/