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authorLinus Torvalds <torvalds@g5.osdl.org>2006-10-30 19:31:20 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-30 19:31:20 -0800
commit528ba4ef855bd184b7d68e3fa596b420fb4fa86a (patch)
tree9b7a296f2ae3942ca401bd099ae92d00bbe366a9 /arch/mips/emma2rh/markeins/platform.c
parentdf6c0cd9a872ebf2298f5d66d8c789f62dbe35fc (diff)
parent21e9ac7b2dd96dfca997313bae6d9a8f642635c7 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] MIPS doesn't need compat_sys_getdents. [MIPS] JMR3927: Fixup another victim of the irq pt_regs cleanup. [MIPS] EMMA 2 / Markeins: struct resource takes physical addresses. [MIPS] EMMA 2 / Markeins: Convert to name struct resource initialization. [MIPS] EMMA 2 / Markeins: Formitting fixes split from actual address fixes. [MIPS] EMMA 2 / Markeins: Fix build wreckage due to genirq wreckage. [MIPS] Ocelot G: Fix build error and numerous warnings. [MIPS] Fix return value of TXX9 SPI interrupt handler [MIPS] Au1000: Fix warning about unused variable. [MIPS] Wire up getcpu(2) and epoll_wait(2) syscalls. [MIPS] Make SB1 cache flushes not to use on_each_cpu [MIPS] Fix warning about unused definition in c-sb1.c [MIPS] SMTC: Make 8 the default number of processors. [MIPS] Oprofile: Fix MIPSxx counter number detection. [MIPS] Au1xx0 code sets incorrect mips_hpt_frequency [MIPS] Oprofile: fix on non-VSMP / non-SMTC SMP configurations.
Diffstat (limited to 'arch/mips/emma2rh/markeins/platform.c')
-rw-r--r--arch/mips/emma2rh/markeins/platform.c88
1 files changed, 56 insertions, 32 deletions
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
index 15cc61df3622..11567702b155 100644
--- a/arch/mips/emma2rh/markeins/platform.c
+++ b/arch/mips/emma2rh/markeins/platform.c
@@ -44,18 +44,45 @@
#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
static struct resource i2c_emma_resources_0[] = {
- { NULL, EMMA2RH_IRQ_PIIC0, EMMA2RH_IRQ_PIIC0, IORESOURCE_IRQ },
- { NULL, KSEG1ADDR(EMMA2RH_PIIC0_BASE), KSEG1ADDR(EMMA2RH_PIIC0_BASE + 0x1000), 0 },
+ {
+ .name = NULL,
+ .start = EMMA2RH_IRQ_PIIC0,
+ .end = EMMA2RH_IRQ_PIIC0,
+ .flags = IORESOURCE_IRQ
+ }, {
+ .name = NULL,
+ .start = EMMA2RH_PIIC0_BASE,
+ .end = EMMA2RH_PIIC0_BASE + 0x1000,
+ .flags = 0
+ },
};
struct resource i2c_emma_resources_1[] = {
- { NULL, EMMA2RH_IRQ_PIIC1, EMMA2RH_IRQ_PIIC1, IORESOURCE_IRQ },
- { NULL, KSEG1ADDR(EMMA2RH_PIIC1_BASE), KSEG1ADDR(EMMA2RH_PIIC1_BASE + 0x1000), 0 },
+ {
+ .name = NULL,
+ .start = EMMA2RH_IRQ_PIIC1,
+ .end = EMMA2RH_IRQ_PIIC1,
+ .flags = IORESOURCE_IRQ
+ }, {
+ .name = NULL,
+ .start = EMMA2RH_PIIC1_BASE,
+ .end = EMMA2RH_PIIC1_BASE + 0x1000,
+ .flags = 0
+ },
};
struct resource i2c_emma_resources_2[] = {
- { NULL, EMMA2RH_IRQ_PIIC2, EMMA2RH_IRQ_PIIC2, IORESOURCE_IRQ },
- { NULL, KSEG1ADDR(EMMA2RH_PIIC2_BASE), KSEG1ADDR(EMMA2RH_PIIC2_BASE + 0x1000), 0 },
+ {
+ .name = NULL,
+ .start = EMMA2RH_IRQ_PIIC2,
+ .end = EMMA2RH_IRQ_PIIC2,
+ .flags = IORESOURCE_IRQ
+ }, {
+ .name = NULL,
+ .start = EMMA2RH_PIIC2_BASE,
+ .end = EMMA2RH_PIIC2_BASE + 0x1000,
+ .flags = 0
+ },
};
struct platform_device i2c_emma_devices[] = {
@@ -83,32 +110,29 @@ struct platform_device i2c_emma_devices[] = {
#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
static struct plat_serial8250_port platform_serial_ports[] = {
- [0] = {
- .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
- .irq = EMMA2RH_IRQ_PFUR0,
- .uartclk = EMMA2RH_SERIAL_CLOCK,
- .regshift = 4,
- .iotype = UPIO_MEM,
- .flags = EMMA2RH_SERIAL_FLAGS,
- },
- [1] = {
- .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
- .irq = EMMA2RH_IRQ_PFUR1,
- .uartclk = EMMA2RH_SERIAL_CLOCK,
- .regshift = 4,
- .iotype = UPIO_MEM,
- .flags = EMMA2RH_SERIAL_FLAGS,
- },
- [2] = {
- .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
- .irq = EMMA2RH_IRQ_PFUR2,
- .uartclk = EMMA2RH_SERIAL_CLOCK,
- .regshift = 4,
- .iotype = UPIO_MEM,
- .flags = EMMA2RH_SERIAL_FLAGS,
- },
- [3] = {
- .flags = 0,
+ [0] = {
+ .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
+ .irq = EMMA2RH_IRQ_PFUR0,
+ .uartclk = EMMA2RH_SERIAL_CLOCK,
+ .regshift = 4,
+ .iotype = UPIO_MEM,
+ .flags = EMMA2RH_SERIAL_FLAGS,
+ }, [1] = {
+ .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
+ .irq = EMMA2RH_IRQ_PFUR1,
+ .uartclk = EMMA2RH_SERIAL_CLOCK,
+ .regshift = 4,
+ .iotype = UPIO_MEM,
+ .flags = EMMA2RH_SERIAL_FLAGS,
+ }, [2] = {
+ .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
+ .irq = EMMA2RH_IRQ_PFUR2,
+ .uartclk = EMMA2RH_SERIAL_CLOCK,
+ .regshift = 4,
+ .iotype = UPIO_MEM,
+ .flags = EMMA2RH_SERIAL_FLAGS,
+ }, [3] = {
+ .flags = 0,
},
};