diff options
| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-08-13 09:56:34 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-09-03 12:08:14 +0200 |
| commit | 38db37ba069f9d801ef56b820cfc7c247a7ffc02 (patch) | |
| tree | 9a053440a3afabd7f7f19bcc65a9cd9d0735f028 /arch/mips/math-emu/cp1emu.c | |
| parent | 400bd2e41393a783e0532321fdb369d2cc15ea26 (diff) | |
MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction
MIPS R6 introduced the following instruction:
Stores in fd a bit mask reflecting the floating-point class of the
floating point scalar value fs.
CLASS.fmt: FPR[fd] = class(FPR[fs])
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/math-emu/cp1emu.c')
| -rw-r--r-- | arch/mips/math-emu/cp1emu.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index a348cbefe4a8..b65b4ea60232 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c @@ -1803,6 +1803,18 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, goto copcsr; } + case fclass_op: { + union ieee754sp fs; + + if (!cpu_has_mips_r6) + return SIGILL; + + SPFROMREG(fs, MIPSInst_FS(ir)); + rv.w = ieee754sp_2008class(fs); + rfmt = w_fmt; + break; + } + case fabs_op: handler.u = ieee754sp_abs; goto scopuop; @@ -2061,6 +2073,18 @@ copcsr: goto copcsr; } + case fclass_op: { + union ieee754dp fs; + + if (!cpu_has_mips_r6) + return SIGILL; + + DPFROMREG(fs, MIPSInst_FS(ir)); + rv.w = ieee754dp_2008class(fs); + rfmt = w_fmt; + break; + } + case fabs_op: handler.u = ieee754dp_abs; goto dcopuop; |