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authorPaul Mundt <lethal@linux-sh.org>2010-02-01 20:01:50 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-02-01 20:01:50 +0900
commitb6c58b1d987a5795086c5c2babd8c7367d2fdb8c (patch)
tree3ec992af50f44dd09ff125165ea1c4ef41b2aecc /arch/sh/drivers/pci/fixups-se7751.c
parentef407beefbd9928792ccc93857e408e0057bc17b (diff)
sh: Improved multi-resource handling for SH7780 PCI.
The SH7780 PCI controller supports 3 different ranges of PCI memory in addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory windows are supported, while in 32-bit mode all 3 are visible. This attempts to make the resource handling completely dynamic and to permit platforms to map in as many apertures as they can handle. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/drivers/pci/fixups-se7751.c')
-rw-r--r--arch/sh/drivers/pci/fixups-se7751.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c
index 475fa9f0fe2c..a4c7d3a4efca 100644
--- a/arch/sh/drivers/pci/fixups-se7751.c
+++ b/arch/sh/drivers/pci/fixups-se7751.c
@@ -97,12 +97,12 @@ int pci_fixup_pcic(struct pci_channel *chan)
* meaning all calls go straight through... use BUG_ON to
* catch erroneous assumption.
*/
- BUG_ON(chan->mem_resource->start != SH7751_PCI_MEMORY_BASE);
+ BUG_ON(chan->resources[1].start != SH7751_PCI_MEMORY_BASE);
- PCIC_WRITE(SH7751_PCIMBR, chan->mem_resource->start);
+ PCIC_WRITE(SH7751_PCIMBR, chan->resources[1].start);
/* Set IOBR for window containing area specified in pci.h */
- PCIC_WRITE(SH7751_PCIIOBR, (chan->io_resource->start & SH7751_PCIIOBR_MASK));
+ PCIC_WRITE(SH7751_PCIIOBR, (chan->resources[0].start & SH7751_PCIIOBR_MASK));
/* All done, may as well say so... */
printk("SH7751 PCI: Finished initialization of the PCI controller\n");