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authorMaciej W. Rozycki <macro@linux-mips.org>2008-05-27 21:19:40 +0100
committerIngo Molnar <mingo@elte.hu>2008-07-08 09:13:05 +0200
commit24742ece8eb01b5855059020ba1c09173fd9b732 (patch)
tree14a19933c7b3afd17fe239f01fa31b321deb54b9 /arch/x86/kernel/io_apic_32.c
parentf7633ce55b2ea2926a39d7ca9d0bb06c43edd2c2 (diff)
x86: I/O APIC: unmask the second-chance timer interrupt
Unmask the timer interrupt line set up in the through-8259A mode explicitly after setup_timer_IRQ0_pin() has set up the I/O APIC interrupt redirection entry to let the two operations be unbound from each other. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/kernel/io_apic_32.c')
-rw-r--r--arch/x86/kernel/io_apic_32.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c
index ce682e873aa7..b381f93b79ae 100644
--- a/arch/x86/kernel/io_apic_32.c
+++ b/arch/x86/kernel/io_apic_32.c
@@ -2185,6 +2185,7 @@ static inline void __init check_timer(void)
* legacy devices should be connected to IO APIC #0
*/
setup_timer_IRQ0_pin(apic2, pin2, vector);
+ unmask_IO_APIC_irq(0);
enable_8259A_irq(0);
if (timer_irq_works()) {
printk("works.\n");